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Date: Tue, 27 Sep 2005 13:36:06 -0700
From: George Anzinger <george@mvista.com>
Reply-To: george@mvista.com
Organization: MontaVista Software
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To: Tim Bird <tim.bird@am.sony.com>
CC: Roman Zippel <zippel@linux-m68k.org>, Thomas Gleixner <tglx@linutronix.de>,
       Ingo Molnar <mingo@elte.hu>, Christopher Friesen <cfriesen@nortel.com>,
       linux-kernel@vger.kernel.org, akpm@osdl.org, johnstul@us.ibm.com,
       paulmck@us.ibm.com
Subject: Re: [ANNOUNCE] ktimers subsystem
References: <Pine.LNX.4.61.0509271839140.3728@scrub.home> <4339918C.2040405@am.sony.com>
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Tim Bird wrote:
> Roman Zippel wrote:
> 
>>On Sun, 25 Sep 2005, Thomas Gleixner wrote:
>>
>>>Can you please point out which architectures do not have a 32x32->64
>>>instruction ?
> 
> 
> <snip>
> 
>>For the rest you might want to check <asm/div64.h>, if div64 has to be 
>>emulated, there are good chances this instruction has to be emulated as 
>>well (especially in smaller embedded archs).
> 
> 
> Hmmm.  In my experience, there are several embedded platforms
> with a 32x32->64 instruction, which are lacking a div64 instruction.
> I don't think checking for div64 is a very good metric here.

Also, even having a div64 instruction does not eliminate the asm/div64.h 
as it checks for results that are >32-bits and does the right thing. 
For example, letting the x86 do this divide with such a result, results 
in a trap.

This is why we need to be very careful where we use the div_ll_l_rem() 
which accesses just this instruction.

-- 
George Anzinger   george@mvista.com
HRT (High-res-timers):  http://sourceforge.net/projects/high-res-timers/
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