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Date: Fri, 10 Nov 2000 02:17:23 +0300
From: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
To: Gerard Roudier <groudier@club-internet.fr>
Cc: Richard Henderson <rth@twiddle.net>, axp-list@redhat.com,
        linux-kernel@vger.kernel.org
Subject: Re: PCI-PCI bridges mess in 2.4.x
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In-Reply-To: <Pine.LNX.4.10.10011092123320.1438-100000@linux.local>; from groudier@club-internet.fr on Thu, Nov 09, 2000 at 09:37:41PM +0100
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On Thu, Nov 09, 2000 at 09:37:41PM +0100, Gerard Roudier wrote:
> Hmmm...
> The PCI spec. says that Limit registers define the top addresses
> _inclusive_.

Correct.

> The spec. does not seem to imagine that a Limit register lower than the
> corresponding Base register will ever exist anywhere, in my opinion. :-)

Not correct.
Here's a quote from `PCI-to-PCI Bridge Architecture Specification rev 1.1':
   The Memory Limit register _must_ be programmed to a smaller value
   than the Memory Base if there are no memory-mapped I/O addresses on the
   secondary side of the bridge.

I/O is slightly different because it's optional for the bridge -
but if it's implemented same rules apply.

> This let me think that trying to be clever here is probably a very bad
> idea. What is so catastrophic of having 1 to 4 bytes of addresses and no
> more being possibly in a forwardable range?
> 
Huh. 1 to 4 bytes? 4K for I/O and 1M for memory.
And it's not trying to be clever (anymore :-) - just strictly following
the Specs.

I understand your point very well, btw. I asked similar questions to myself
until I've had the docs.

Ivan.
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