Date: Fri, 28 Oct 2005 10:13:59 +0200
From: Lennert Buytenhek <buytenh@wantstofly.org>
To: John Bowler <jbowler@acm.org>
Cc: "'Deepak Saxena'" <dsaxena@plexity.net>, linux-kernel@vger.kernel.org,
       linux-arm-kernel@lists.arm.linux.org.uk
Subject: Re: [PATCH] 2.6.14-rc3 ixp4xx_copy_from little endian/alignment
Message-ID: <20051028081359.GA26901@xi.wantstofly.org>
References: <000e01c5db86$29ba4120$1001a8c0@kalmiopsis>
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On Thu, Oct 27, 2005 at 11:09:31PM -0700, John Bowler wrote:

> +/* On a little-endian IXP4XX system (tested on NSLU2) contrary to the
> + * Intel documentation LDRH/STRH appears to XOR the address with 10b.

It's unlikely that ldrh/strh in LE mode behave differently than
on any other little-endian ARM system out there.  Maybe what was
meant is that this flaw only applies to accesses to the flash
controller (more likely)?  If so, can the comment be updated to
reflect that?


thanks,
Lennert
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