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Subject: Re: [RFC PATCH v5 4/4] x86/acrn: Add hypercall for ACRN guest
To:     Borislav Petkov <bp@alien8.de>
Cc:     Ingo Molnar <mingo@kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "x86@kernel.org" <x86@kernel.org>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "Chen, Jason CJ" <jason.cj.chen@intel.com>
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 <4c5ca6d7-ffb1-a5a5-9e46-9057802318e0@intel.com>
 <20190429073625.GA2324@zn.tnic>
From:   "Zhao, Yakui" <yakui.zhao@intel.com>
Message-ID: <923a3152-8029-14e9-9713-871b041c9c99@intel.com>
Date:   Mon, 29 Apr 2019 17:52:13 +0800
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On 2019年04月29日 15:36, Borislav Petkov wrote:
> On Mon, Apr 29, 2019 at 09:24:12AM +0800, Zhao, Yakui wrote:
>> Yes. "movq" only indicates explicitly that it is 64-bit mov as ACRN guest
>> only works under 64-bit mode.
>> I also check the usage of "mov" and "movq" in this scenario. There is no
>> difference except that the movq is an explicit 64-op.
> 
> Damn, I'm tired of explaining this: it is explicit only to the code
> reader. gcc generates the *same* instruction no matter whether it has a
> "q" suffix or not as long as the destination register is a 64-bit one.
> 
> If you prefer to have it explicit, sure, use "movq".

Hi, Borislav

     Thanks for the detailed explanation.
     "movq" will be used so that it is explicit to the code reader 
although the same binary is generated for "movq" and "mov" in this scenario.

     And thank you again for giving a lot of helps about removing the 
usage of explicit register variable.

Best regards
    Yakui
>