Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp3739169yba; Mon, 29 Apr 2019 07:46:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqxYu2Olo5XJXFZd7KigzQ0wdVlekNb/tlJVdpF+JJ4wrErpmJwm2goVDDMvs/IRYql24VSo X-Received: by 2002:aa7:8dcf:: with SMTP id j15mr41165059pfr.175.1556549165528; Mon, 29 Apr 2019 07:46:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556549165; cv=none; d=google.com; s=arc-20160816; b=mbW2UD+7uuR7T66MJoFzgPpaviudji1RG6KlpQ1SErMvUwsonqGnhZ1VlC4BC3yRo9 IOLU3/yM8hUh91tx9TFnSLbx9/aDA4ILMFuGp85dZbcRCVCYNqCtmh9DIOxKKl/5rxIE qRr5L9z48ODgWnuGOCmlo1Ob/1OpaD0eysCGk2Vj01F/n8M0FfCHB4xe89dWyU8WVwtK SkgH2O62JyovBx1ICczL0HulN4PsI47m7grEkMJe9BuowF6NvdFKHsY7q6ZQ/3a/IrR7 HR4ERCJ+CdCpD6MEHszbqoAeF8Vg5hxL5FK7X5vPkL5ldeW/NNqExyURaQ/bv5/njQ68 p6Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=t+UA4b2McqV5k1deEbUo40YuXtDvjHl6XokvwwsxtTA=; b=cBGoPexpMRdcjXJdBrz+9qobMxhtbVIJ67eeCBsWPKG5iLp44wpsRr7gF8vCxxVcKX 1W2HIYF0HTeWsqgcKn6OHSdI+xr5E9AZDh9eVFcBBj/+50V9F0chZhWOZPcMdDgkPsGL y8VZcYSGS8p4iXoCBibAeJbJqs1l5jKSSkJEihck8CKVVK83pZEBiPrDx/l+rXftFctO CbhP8b1BH9Fr/47JRM+E35rmlQyNrRH2Gv5ONVxGxtxbY7QVFmvQIoIe+UlXF6z3sgsU dV0DVziUa4ex8VKlXdE4tQG+SMi9lFaYiVZsqb9SwpEeNf5LOEfZue06b8er0eV19038 EbpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b68si34471162plb.351.2019.04.29.07.45.50; Mon, 29 Apr 2019 07:46:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728443AbfD2Oon (ORCPT + 99 others); Mon, 29 Apr 2019 10:44:43 -0400 Received: from foss.arm.com ([217.140.101.70]:58946 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728342AbfD2Ook (ORCPT ); Mon, 29 Apr 2019 10:44:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 445C8EBD; Mon, 29 Apr 2019 07:44:40 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8E9B3F5C1; Mon, 29 Apr 2019 07:44:37 -0700 (PDT) From: Julien Grall To: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: logang@deltatee.com, douliyangs@gmail.com, miquel.raynal@bootlin.com, marc.zyngier@arm.com, jason@lakedaemon.net, tglx@linutronix.de, joro@8bytes.org, robin.murphy@arm.com, bigeasy@linutronix.de, linux-rt-users@vger.kernel.org, Julien Grall Subject: [PATCH v2 1/7] genirq/msi: Add a new field in msi_desc to store an IOMMU cookie Date: Mon, 29 Apr 2019 15:44:22 +0100 Message-Id: <20190429144428.29254-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190429144428.29254-1-julien.grall@arm.com> References: <20190429144428.29254-1-julien.grall@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When an MSI doorbell is located downstream of an IOMMU, it is required to swizzle the physical address with an appropriately-mapped IOVA for any device attached to one of our DMA ops domain. At the moment, the allocation of the mapping may be done when composing the message. However, the composing may be done in non-preemtible context while the allocation requires to be called from preemptible context. A follow-up change will split the current logic in two functions requiring to keep an IOMMU cookie per MSI. A new field is introduced in msi_desc to store an IOMMU cookie. As the cookie may not be required in some configuration, the field is protected under a new config CONFIG_IRQ_MSI_IOMMU. A pair of helpers has also been introduced to access the field. Signed-off-by: Julien Grall --- Changes in v2: - Update the commit message to use imperative mood - Protect the field with a new config that will be selected by IOMMU_DMA later on - Add a set of helpers to access the new field --- include/linux/msi.h | 26 ++++++++++++++++++++++++++ kernel/irq/Kconfig | 3 +++ 2 files changed, 29 insertions(+) diff --git a/include/linux/msi.h b/include/linux/msi.h index 7e9b81c3b50d..82a308c19222 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -77,6 +77,9 @@ struct msi_desc { struct device *dev; struct msi_msg msg; struct irq_affinity_desc *affinity; +#ifdef CONFIG_IRQ_MSI_IOMMU + const void *iommu_cookie; +#endif union { /* PCI MSI/X specific data */ @@ -119,6 +122,29 @@ struct msi_desc { #define for_each_msi_entry_safe(desc, tmp, dev) \ list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list) +#ifdef CONFIG_IRQ_MSI_IOMMU +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return desc->iommu_cookie; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ + desc->iommu_cookie = iommu_cookie; +} +#else +static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc) +{ + return NULL; +} + +static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc, + const void *iommu_cookie) +{ +} +#endif + #ifdef CONFIG_PCI_MSI #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) #define for_each_pci_msi_entry(desc, pdev) \ diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index 5f3e2baefca9..8fee06625c37 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -91,6 +91,9 @@ config GENERIC_MSI_IRQ_DOMAIN select IRQ_DOMAIN_HIERARCHY select GENERIC_MSI_IRQ +config IRQ_MSI_IOMMU + bool + config HANDLE_DOMAIN_IRQ bool -- 2.11.0