Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp3830914yba; Mon, 29 Apr 2019 09:12:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqznWfsv0uvGhkTyAE/93nUvXrhisUSNGyc5mXDuwPG9WL2aNsp1YUMd4eus4voT1v/ztQKL X-Received: by 2002:a17:902:6b82:: with SMTP id p2mr5261491plk.99.1556554358991; Mon, 29 Apr 2019 09:12:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556554358; cv=none; d=google.com; s=arc-20160816; b=cUOoeG9W+f3bIcIpxV5t74YXHAIksrJLkkC1UlZ1+nhKWF0VIslse+ON1WsmPi/skV Y4CUCSZPlCKc7cp4xHraPj8hL2BMLUQpAJmN+ygsZNwG6Um6WEthEv5j/NbBqj0e0Ef5 J8JGefnYzv0xTps7TvcoO7zDoxzwViOH8lvfL0L+KB7CTql6aNcKQUGAyUnD8nmYicFj xY04eJ92OTTG7J+O5ydnlwEXmgCH8KiD7b/9apHdJX4By58hj+BGXntyPzN2VLmhZA/b m0j1Et8sLLBwItY5oH9x/43+0wlKAxI8e01Vv3VCAnezWqpMo3f/sYPfb/LZTcsjfF3D 3jBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=iBWeosZlLJb0v5dSmeMsyLrDsZAHk1auKJrbV87FKhE=; b=qBg1DyTk1QziTeM9TWNvDOAHTpTfy5t5lVPb4ifFncXxKctLawFI896kCeXl9/5Ydr b11iR0K64/75ZxhhkvJggEbLF+rSd6sdCESjIA1xGbMcJmRfjGhmzlJ/zYJFtutp4Z+u ENcSpZZ3GGh6HwqxlnhH4Mjc2ayxAVNLMdOMK7vBzdKKPHkSTzKjUc/HwclF73Bcfnl7 wfTUEXI14qXS5lYb0vG2HbkvXsgJtcyg2UfJqKBFeGntgriUi4etlbjHMtIN52swc9pt Vk6GEmeFSJcoSkBO22sflT1SiQtrjOfM2H7pfRsvZHNIAiR+8N6222/1p/xnsmSApkQL au+w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k75si32089469pgc.515.2019.04.29.09.12.22; Mon, 29 Apr 2019 09:12:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728625AbfD2QJm (ORCPT + 99 others); Mon, 29 Apr 2019 12:09:42 -0400 Received: from foss.arm.com ([217.140.101.70]:33200 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728253AbfD2QJl (ORCPT ); Mon, 29 Apr 2019 12:09:41 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6DC65EBD; Mon, 29 Apr 2019 09:09:41 -0700 (PDT) Received: from [10.1.196.75] (e110467-lin.cambridge.arm.com [10.1.196.75]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B1EA13F5C1; Mon, 29 Apr 2019 09:09:39 -0700 (PDT) Subject: Re: [PATCH v4 2/3] iommu/dma: Reserve IOVA for PCIe inaccessible DMA address To: Srinath Mannam , Bjorn Helgaas , Joerg Roedel , Lorenzo Pieralisi , poza@codeaurora.org, Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org References: <1555038815-31916-1-git-send-email-srinath.mannam@broadcom.com> <1555038815-31916-3-git-send-email-srinath.mannam@broadcom.com> From: Robin Murphy Message-ID: Date: Mon, 29 Apr 2019 17:09:38 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <1555038815-31916-3-git-send-email-srinath.mannam@broadcom.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/04/2019 04:13, Srinath Mannam wrote: > dma_ranges field of PCI host bridge structure has resource entries in > sorted order of address range given through dma-ranges DT property. This > list is the accessible DMA address range. So that this resource list will > be processed and reserve IOVA address to the inaccessible address holes in > the list. > > This method is similar to PCI IO resources address ranges reserving in > IOMMU for each EP connected to host bridge. > > Signed-off-by: Srinath Mannam > Based-on-patch-by: Oza Pawandeep > Reviewed-by: Oza Pawandeep > --- > drivers/iommu/dma-iommu.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c > index d19f3d6..fb42d7c 100644 > --- a/drivers/iommu/dma-iommu.c > +++ b/drivers/iommu/dma-iommu.c > @@ -212,6 +212,7 @@ static void iova_reserve_pci_windows(struct pci_dev *dev, > struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); > struct resource_entry *window; > unsigned long lo, hi; > + phys_addr_t start = 0, end; > > resource_list_for_each_entry(window, &bridge->windows) { > if (resource_type(window->res) != IORESOURCE_MEM) > @@ -221,6 +222,24 @@ static void iova_reserve_pci_windows(struct pci_dev *dev, > hi = iova_pfn(iovad, window->res->end - window->offset); > reserve_iova(iovad, lo, hi); > } > + > + /* Get reserved DMA windows from host bridge */ > + resource_list_for_each_entry(window, &bridge->dma_ranges) { > + end = window->res->start - window->offset; > +resv_iova: > + if (end - start) { > + lo = iova_pfn(iovad, start); > + hi = iova_pfn(iovad, end); > + reserve_iova(iovad, lo, hi); > + } > + start = window->res->end - window->offset + 1; > + /* If window is last entry */ > + if (window->node.next == &bridge->dma_ranges && > + end != DMA_BIT_MASK(sizeof(dma_addr_t) * BITS_PER_BYTE)) { I still think that's a very silly way to write "~(dma_addr_t)0", but otherwise, Acked-by: Robin Murphy > + end = DMA_BIT_MASK(sizeof(dma_addr_t) * BITS_PER_BYTE); > + goto resv_iova; > + } > + } > } > > static int iova_reserve_iommu_regions(struct device *dev, >