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From:   "james qian wang (Arm Technology China)" <james.qian.wang@arm.com>
To:     "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>
CC:     Liviu Dudau <Liviu.Dudau@arm.com>,
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Subject: Re: [v1, 2/2] dt/bindings: drm/komeda: Adds SMMU support for D71
 devicetree
Thread-Topic: [v1, 2/2] dt/bindings: drm/komeda: Adds SMMU support for D71
 devicetree
Thread-Index: AQHU/ydZVkhRNHPXX0aJoYulI/NjeQ==
Date:   Tue, 30 Apr 2019 07:35:57 +0000
Message-ID: <20190430073549.GB9516@james-ThinkStation-P300>
References: <1556605118-22700-3-git-send-email-lowry.li@arm.com>
In-Reply-To: <1556605118-22700-3-git-send-email-lowry.li@arm.com>
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On Tue, Apr 30, 2019 at 06:19:34AM +0000, Lowry Li (Arm Technology China) w=
rote:
> Updates the device-tree doc about how to enable SMMU by devicetree.
>=20
> Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
> ---
>  Documentation/devicetree/bindings/display/arm,komeda.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
>=20
> --=20
> 1.9.1
>=20
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/D=
ocumentation/devicetree/bindings/display/arm,komeda.txt
> index 02b2265..b12c045 100644
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.txt
> @@ -11,6 +11,10 @@ Required properties:
>        - "pclk": for the APB interface clock
>  - #address-cells: Must be 1
>  - #size-cells: Must be 0
> +- iommus: configure the stream id to IOMMU, Must be configured if want t=
o
> +    enable iommu in display. for how to configure this node please refer=
ence
> +        devicetree/bindings/iommu/arm,smmu-v3.txt,
> +        devicetree/bindings/iommu/iommu.txt
> =20
>  Required properties for sub-node: pipeline@nq
>  Each device contains one or two pipeline sub-nodes (at least one), each
> @@ -44,6 +48,9 @@ Example:
>  		interrupts =3D <0 168 4>;
>  		clocks =3D <&dpu_mclk>, <&dpu_aclk>;
>  		clock-names =3D "mclk", "pclk";
> +		iommus =3D <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> +			<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> +			<&smmu 8>, <&smmu 9>;
> =20
>  		dp0_pipe0: pipeline@0 {
>  			clocks =3D <&fpgaosc2>, <&dpu_aclk>;

Looks good to me

James
--=20
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.co=
m>