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Wed, 01 May 2019 23:23:44 -0700 (PDT) MIME-Version: 1.0 References: <20190426164224.11327-1-pawel.mikolaj.chmiel@gmail.com> <20190426164224.11327-5-pawel.mikolaj.chmiel@gmail.com> <20190502015408.GA11612@bogus> In-Reply-To: <20190502015408.GA11612@bogus> From: Tomasz Figa Date: Thu, 2 May 2019 15:23:33 +0900 Message-ID: Subject: Re: [PATCH 4/5] dt-binding: mtd: onenand/samsung: Add device tree support To: Rob Herring Cc: =?UTF-8?Q?Pawe=C5=82_Chmiel?= , Kyungmin Park , bbrezillon@kernel.org, miquel.raynal@bootlin.com, richard@nod.at, David Woodhouse , computersforpeace@gmail.com, marek.vasut@gmail.com, Mark Rutland , linux-mtd@lists.infradead.org, linux-kernel , devicetree Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2019=E5=B9=B45=E6=9C=882=E6=97=A5(=E6=9C=A8) 10:54 Rob Herring : > > On Fri, Apr 26, 2019 at 06:42:23PM +0200, Pawe=C5=82 Chmiel wrote: > > From: Tomasz Figa > > > > This patch adds dt-bindings for Samsung OneNAND driver. > > > > Signed-off-by: Tomasz Figa > > Signed-off-by: Pawe=C5=82 Chmiel > > --- > > .../bindings/mtd/samsung-onenand.txt | 46 +++++++++++++++++++ > > 1 file changed, 46 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/mtd/samsung-onena= nd.txt > > > > diff --git a/Documentation/devicetree/bindings/mtd/samsung-onenand.txt = b/Documentation/devicetree/bindings/mtd/samsung-onenand.txt > > new file mode 100644 > > index 000000000000..341d97cc1513 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mtd/samsung-onenand.txt > > @@ -0,0 +1,46 @@ > > +Device tree bindings for Samsung SoC OneNAND controller > > + > > +Required properties: > > + - compatible : value should be either of the following. > > + (a) "samsung,s3c6400-onenand" - for onenand controller compatible w= ith > > + S3C6400 SoC, > > + (b) "samsung,s3c6410-onenand" - for onenand controller compatible w= ith > > + S3C6410 SoC, > > + (c) "samsung,s5pc100-onenand" - for onenand controller compatible w= ith > > + S5PC100 SoC, > > + (d) "samsung,s5pv210-onenand" - for onenand controller compatible w= ith > > + S5PC110/S5PV210 SoCs. > > + > > + - reg : two memory mapped register regions: > > + - first entry: control registers. > > + - second and next entries: memory windows of particular OneNAND chi= ps; > > + for variants a), b) and c) only one is allowed, in case of d) up = to > > + two chips can be supported. > > + > > + - interrupt-parent : phandle of interrupt controller to which the One= NAND > > + controller is wired, > > This is implied and can be removed. > > > + - interrupts : specifier of interrupt signal to which the OneNAND con= troller > > + is wired; should contain just one entry. > > + - clock-names : should contain two entries: > > + - "bus" - bus clock of the controller, > > + - "onenand" - clock supplied to OneNAND memory. > > If the clock just goes to the OneNAND device, then it should be in the > nand device node rather than the controller node. > (Trying hard to recall the details about this hardware.) AFAIR the clock goes to the controller and the controller then feeds it to the memory chips. Also I don't think we should have any nand device nodes here, since the memory itself is only exposed via the controller, which offers various queries to probe the memory at runtime, so there is no need to describe it in DT. > > + - clock: should contain list of phandles and specifiers for all clock= s listed > > + in clock-names property. > > + - #address-cells : must be 1, > > + - #size-cells : must be 1. > > This implies some child nodes. What are the child nodes? > I can't recall the reason for this unfortunately. Best regards, Tomasz