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From:   Tomasz Figa <tomasz.figa@gmail.com>
Date:   Thu, 2 May 2019 15:58:24 +0900
Message-ID: <CA+Ln22EJ3G9ez4XZ3ysZBt6thsqDYDtik8fw-gfExR9Y7wFN9A@mail.gmail.com>
Subject: Re: [PATCH 4/5] dt-binding: mtd: onenand/samsung: Add device tree support
To:     Boris Brezillon <boris.brezillon@collabora.com>
Cc:     Rob Herring <robh@kernel.org>,
        =?UTF-8?Q?Pawe=C5=82_Chmiel?= <pawel.mikolaj.chmiel@gmail.com>,
        Kyungmin Park <kyungmin.park@samsung.com>,
        bbrezillon@kernel.org, miquel.raynal@bootlin.com, richard@nod.at,
        David Woodhouse <dwmw2@infradead.org>,
        computersforpeace@gmail.com, marek.vasut@gmail.com,
        Mark Rutland <mark.rutland@arm.com>,
        linux-mtd@lists.infradead.org,
        linux-kernel <linux-kernel@vger.kernel.org>,
        devicetree <devicetree@vger.kernel.org>
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2019=E5=B9=B45=E6=9C=882=E6=97=A5(=E6=9C=A8) 15:55 Boris Brezillon <boris.b=
rezillon@collabora.com>:
>
> On Thu, 2 May 2019 15:42:59 +0900
> Tomasz Figa <tomasz.figa@gmail.com> wrote:
>
> > 2019=E5=B9=B45=E6=9C=882=E6=97=A5(=E6=9C=A8) 15:36 Boris Brezillon <bor=
is.brezillon@collabora.com>:
> > >
> > > Hi Tomasz,
> > >
> > > On Thu, 2 May 2019 15:23:33 +0900
> > > Tomasz Figa <tomasz.figa@gmail.com> wrote:
> > >
> > > > 2019=E5=B9=B45=E6=9C=882=E6=97=A5(=E6=9C=A8) 10:54 Rob Herring <rob=
h@kernel.org>:
> > > > >
> > > > > On Fri, Apr 26, 2019 at 06:42:23PM +0200, Pawe=C5=82 Chmiel wrote=
:
> > > > > > From: Tomasz Figa <tomasz.figa@gmail.com>
> > > > > >
> > > > > > This patch adds dt-bindings for Samsung OneNAND driver.
> > > > > >
> > > > > > Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
> > > > > > Signed-off-by: Pawe=C5=82 Chmiel <pawel.mikolaj.chmiel@gmail.co=
m>
> > > > > > ---
> > > > > >  .../bindings/mtd/samsung-onenand.txt          | 46 +++++++++++=
++++++++
> > > > > >  1 file changed, 46 insertions(+)
> > > > > >  create mode 100644 Documentation/devicetree/bindings/mtd/samsu=
ng-onenand.txt
> > > > > >
> > > > > > diff --git a/Documentation/devicetree/bindings/mtd/samsung-onen=
and.txt b/Documentation/devicetree/bindings/mtd/samsung-onenand.txt
> > > > > > new file mode 100644
> > > > > > index 000000000000..341d97cc1513
> > > > > > --- /dev/null
> > > > > > +++ b/Documentation/devicetree/bindings/mtd/samsung-onenand.txt
> > > > > > @@ -0,0 +1,46 @@
> > > > > > +Device tree bindings for Samsung SoC OneNAND controller
> > > > > > +
> > > > > > +Required properties:
> > > > > > + - compatible : value should be either of the following.
> > > > > > +   (a) "samsung,s3c6400-onenand" - for onenand controller comp=
atible with
> > > > > > +       S3C6400 SoC,
> > > > > > +   (b) "samsung,s3c6410-onenand" - for onenand controller comp=
atible with
> > > > > > +       S3C6410 SoC,
> > > > > > +   (c) "samsung,s5pc100-onenand" - for onenand controller comp=
atible with
> > > > > > +       S5PC100 SoC,
> > > > > > +   (d) "samsung,s5pv210-onenand" - for onenand controller comp=
atible with
> > > > > > +       S5PC110/S5PV210 SoCs.
> > > > > > +
> > > > > > + - reg : two memory mapped register regions:
> > > > > > +   - first entry: control registers.
> > > > > > +   - second and next entries: memory windows of particular One=
NAND chips;
> > > > > > +     for variants a), b) and c) only one is allowed, in case o=
f d) up to
> > > > > > +     two chips can be supported.
> > > > > > +
> > > > > > + - interrupt-parent : phandle of interrupt controller to which=
 the OneNAND
> > > > > > +   controller is wired,
> > > > >
> > > > > This is implied and can be removed.
> > > > >
> > > > > > + - interrupts : specifier of interrupt signal to which the One=
NAND controller
> > > > > > +   is wired; should contain just one entry.
> > > > > > + - clock-names : should contain two entries:
> > > > > > +   - "bus" - bus clock of the controller,
> > > > > > +   - "onenand" - clock supplied to OneNAND memory.
> > > > >
> > > > > If the clock just goes to the OneNAND device, then it should be i=
n the
> > > > > nand device node rather than the controller node.
> > > > >
> > > >
> > > > (Trying hard to recall the details about this hardware.)
> > > > AFAIR the clock goes to the controller and the controller then feed=
s
> > > > it to the memory chips.
> > > >
> > > > Also I don't think we should have any nand device nodes here, since
> > > > the memory itself is only exposed via the controller, which offers
> > > > various queries to probe the memory at runtime, so there is no need=
 to
> > > > describe it in DT.
> > >
> > > It's probably true, though not providing this controller/device
> > > separation for NAND controller/devices has proven to be a mistake for
> > > raw NAND controllers (some props apply to the controllers and others =
to
> > > the NAND device, not to mention that some controllers support
> > > interacting with several chips), so, if that's a new binding, I'd
> > > recommend having this separation even if it's not strictly required.
> > >
> >
> > Note that OneNAND is a totally different thing than the typical NAND
> > memory with NAND interface. OneNAND chips have a NOR-like interface,
> > with internal controller and buffers inside, so technically they can
> > be even used without any special controller on the SoC, via a generic
> > parallel host interface and possibly some regular DMA engine for CPU
> > offload.
>
> Yes, I know that.
>
> >
> > The controller design of the SoCs in question further abstracts the
> > OneNAND's programming interface into a number of high level operations
> > and attempts to hide the details of the underlying memory, so I don't
> > see the point of describing the memory in DT here, it would actually
> > defeat the purpose of this controller.
>
> I don't see how having a subnode for the NAND chip would change
> anything on how the controller interacts with the NAND device. My point
> is, if we ever need to add props that apply to the device rather than
> the controller itself, having a single node to represent both elements
> is not that great.

You mean, just having a very generic onenand@0 node that doesn't
really include any information, except maybe the partition table? I
guess that wouldn't have any negative side effects indeed.

My point was that we don't want to put things like chip vendor, size,
etc. in DT, since that's enumerable.

Best regards,
Tomasz