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[209.132.180.67]) by mx.google.com with ESMTP id y92si1525949plb.251.2019.05.03.00.30.49; Fri, 03 May 2019 00:31:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=hEJ22Rh6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726628AbfECHQl (ORCPT + 99 others); Fri, 3 May 2019 03:16:41 -0400 Received: from mail-qt1-f193.google.com ([209.85.160.193]:39766 "EHLO mail-qt1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726579AbfECHQl (ORCPT ); Fri, 3 May 2019 03:16:41 -0400 Received: by mail-qt1-f193.google.com with SMTP id y42so5619087qtk.6 for ; Fri, 03 May 2019 00:16:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=KlnuPNTSqAOsReFStbtqUTb18X37z9g45qyDj7kddRA=; b=hEJ22Rh6lnEcmSMaMMuUlZdfXJ7KCYTX3AM2srreiE8Sf6OAnRXfVnZRnjcSn4jHPY 3p24HRD5HVSh44RxdFmCpqu/1sYnULlRTl0XRo2uF6K5RVegrPF0550505OwkW0+qT+m 5FmONnZuEwLBqfg9dGyH0yJSkdmST31cbhVaE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=KlnuPNTSqAOsReFStbtqUTb18X37z9g45qyDj7kddRA=; b=lYMuJb21adn0+EP6ETzzO1ccsyCGLpczq0HGWJ1nUcBK4Cwh1dDFTYXhMWqLjrBDke ZmawzFf/Mh9LBXr8j1SGUE6AguzAoGrmGYRi9SvaJ1/+8vfJRzgDoW0WnLDX9OOrDiU4 hw/pqTvjzcXt44iqsVr03M3B4Mur9r9rXG9Xh+s2qR6L+zMv4mwTSUvcnnDEj/k1B0U0 V7jxI8hBsq3bG1fR9NascW7bNhqVxw56p+ZbKC0IAMY3U4FkDJB5pz7yyxS/Z3hEA6o6 kdkKF2N6nhgLKt78Fpbt0Rga4oJXI2F+5b6ZvHxyJQP3b8xzvuF+J3BUWFnBgJWo22oX juVQ== X-Gm-Message-State: APjAAAXsyALSGz0ccuFu7OypNKkeKC4RyZKco4uf8hbxElZYE9IfO3Gf GgEDh50SyLTdC2LtzujHd9lULXEIj6a98QkSrth6mQ== X-Received: by 2002:ad4:534b:: with SMTP id v11mr6824906qvs.31.1556867800383; Fri, 03 May 2019 00:16:40 -0700 (PDT) MIME-Version: 1.0 References: <1556793795-25204-1-git-send-email-michael.kao@mediatek.com> <1556793795-25204-3-git-send-email-michael.kao@mediatek.com> In-Reply-To: <1556793795-25204-3-git-send-email-michael.kao@mediatek.com> From: Hsin-Yi Wang Date: Fri, 3 May 2019 15:16:29 +0800 Message-ID: Subject: Re: [PATCH 2/8] arm64: dts: mt8183: add/update dynamic power coefficients To: "michael.kao" Cc: fan.chen@mediatek.com, jamesjj.liao@mediatek.com, dawei.chien@mediatek.com, louis.yu@mediatek.com, roger.lu@mediatek.com, Zhang Rui , Eduardo Valentin , Daniel Lezcano , Rob Herring , Mark Rutland , Matthias Brugger , devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 2, 2019 at 10:43 AM michael.kao wrote: > > Add dynamic power coefficients for all cores and update those of > CPU0 and CPU4. > > Signed-off-by: Michael.Kao > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index b92116f..5668fb8 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -58,6 +58,8 @@ > compatible = "arm,cortex-a53"; > reg = <0x000>; > enable-method = "psci"; > + dynamic-power-coefficient = <84>; > + #cooling-cells = <2>; Should this line be in [3/8] arm64: dts: mt8183: Add #cooling-cells to CPU nodes? > }; > > cpu1: cpu@1 { > @@ -65,6 +67,8 @@ > compatible = "arm,cortex-a53"; > reg = <0x001>; > enable-method = "psci"; > + dynamic-power-coefficient = <84>; > + #cooling-cells = <2>; > }; > > cpu2: cpu@2 { > @@ -72,6 +76,8 @@ > compatible = "arm,cortex-a53"; > reg = <0x002>; > enable-method = "psci"; > + dynamic-power-coefficient = <84>; > + #cooling-cells = <2>; > }; > > cpu3: cpu@3 { > @@ -79,6 +85,8 @@ > compatible = "arm,cortex-a53"; > reg = <0x003>; > enable-method = "psci"; > + dynamic-power-coefficient = <84>; > + #cooling-cells = <2>; > }; > > cpu4: cpu@100 { > @@ -86,6 +94,8 @@ > compatible = "arm,cortex-a73"; > reg = <0x100>; > enable-method = "psci"; > + dynamic-power-coefficient = <211>; > + #cooling-cells = <2>; > }; > > cpu5: cpu@101 { > @@ -93,6 +103,8 @@ > compatible = "arm,cortex-a73"; > reg = <0x101>; > enable-method = "psci"; > + dynamic-power-coefficient = <211>; > + #cooling-cells = <2>; > }; > > cpu6: cpu@102 { > @@ -100,6 +112,8 @@ > compatible = "arm,cortex-a73"; > reg = <0x102>; > enable-method = "psci"; > + dynamic-power-coefficient = <211>; > + #cooling-cells = <2>; > }; > > cpu7: cpu@103 { > @@ -107,6 +121,8 @@ > compatible = "arm,cortex-a73"; > reg = <0x103>; > enable-method = "psci"; > + dynamic-power-coefficient = <211>; > + #cooling-cells = <2>; > }; > }; >