Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp334999yba; Fri, 3 May 2019 02:48:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqxBmvucfjNiLcMSI0TRVol2obypKFcVP77YHHlR1skNRSpwBi5Rvo/DXcTTidJgVBLjhFN+ X-Received: by 2002:a17:902:446:: with SMTP id 64mr4676717ple.322.1556876937589; Fri, 03 May 2019 02:48:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1556876937; cv=none; d=google.com; s=arc-20160816; b=PvPf+lpEqpvbCVlWcvsr0JggvnoPJvO0Wx+wTWe2qu7j7VjDsuMkAOajvJ2SU1Inh5 hrX3hpky33lCm5K0NY52HntCW6omZFbteVpI0bS7i3ZS+i0JdorjzA3jHyLSmQ8mqOXp 4YmCsBr8huF7arOrxabDktjqcT7dsOCAKVG+fsjL3yXmhR8uNb07SG0vgjmlo1TKHS56 gh5MKFQ5jSThaObOGt65F5RXoLL8ejUrr+6y5V6hGsTankvMSwDqnPmZ4xYHCntNYRbH tbcl77XBMenYzOuCVbV/83DMqzP5P2XRGhnX+R76cYm1+tY+ZC5eImo39EeMsmYwwGmD zrKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=+ndUcKERF0RcSPKQvROOW9pXp23qMjhYzCXbs1m1F6A=; b=tD+jYmsnAV7GtIzlGPWucS7frlwfkCvoPeaL1MVjq2hm6zjh2VLtw+FZPzrMkoFcpj VL8PNDgn4Elodhg6U8AE7nKRXBCa4WmpPGWQQZELopsCDkBWm8KC9d9d6LUKEB7cpYbo x1FHdowrZN6QEgyT5Vquqo2+hsmKigg+9F+eCOnXpcWvLZ9VADN0/tVjG2wsamiOmJu7 Jgz4KPOnyfQA9ZLO3gYyZvYGZOlLzPfZ8QC+n3UNV1qvSPJIi0CwNBrZb1KllH3XdLJF oWBKEOGkpN/SOvo2Xhq3Xzk3AkmBQDcWqs1syfKvHUlN4QxGHNEzK9NxVTpXk+39CDEw sfrw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 30si1775157plc.8.2019.05.03.02.48.42; Fri, 03 May 2019 02:48:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727189AbfECJrr (ORCPT + 99 others); Fri, 3 May 2019 05:47:47 -0400 Received: from hermes.aosc.io ([199.195.250.187]:36975 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726495AbfECJrr (ORCPT ); Fri, 3 May 2019 05:47:47 -0400 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 0EE74431BF; Fri, 3 May 2019 09:47:43 +0000 (UTC) From: Icenowy Zheng To: Maxime Ripard , Chen-Yu Tsai Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v2] arm64: dts: allwinner: h6: add PIO VCC bank supplies for Pine H64 Date: Fri, 3 May 2019 17:47:20 +0800 Message-Id: <20190503094720.21502-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Allwinner H6 SoC features tweakable VCC for PC, PD, PG, PL and PM banks. This patch adds supplies for these banks except PL bank. PL bank is where PMIC is attached, and currently if a PMIC regulator is added for it a dependency loop will happen. Signed-off-by: Icenowy Zheng --- Changes in v2: - Added PG/PM banks. arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts index 4802902e128f..9e464d40cbff 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts @@ -127,6 +127,12 @@ status = "okay"; }; +&pio { + vcc-pc-supply = <®_bldo2>; + vcc-pd-supply = <®_cldo1>; + vcc-pg-supply = <®_aldo1>; +}; + &r_i2c { status = "okay"; @@ -247,6 +253,10 @@ }; }; +&r_pio { + vcc-pm-supply = <®_aldo1>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_ph_pins>; -- 2.18.1