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From:   Akinobu Mita <akinobu.mita@gmail.com>
Date:   Sat, 4 May 2019 23:26:55 +0900
Message-ID: <CAC5umyjsAh7aZ8JEh8=QMXpNwRdnxxfdPBDwmuVKfafG+rT-PA@mail.gmail.com>
Subject: Re: [PATCH 3/4] nvme-pci: add device coredump support
To:     Minwoo Im <minwoo.im.dev@gmail.com>
Cc:     linux-nvme@lists.infradead.org,
        LKML <linux-kernel@vger.kernel.org>, Jens Axboe <axboe@fb.com>,
        Sagi Grimberg <sagi@grimberg.me>,
        Keith Busch <keith.busch@intel.com>,
        Johannes Berg <johannes@sipsolutions.net>,
        Christoph Hellwig <hch@lst.de>
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2019=E5=B9=B45=E6=9C=884=E6=97=A5(=E5=9C=9F) 19:04 Minwoo Im <minwoo.im.dev=
@gmail.com>:
>
> Hi, Akinobu,
>
> Regardless to reply of the cover, few nits here.
>
> On 5/2/19 5:59 PM, Akinobu Mita wrote:
> > +
> > +static const struct nvme_reg nvme_regs[] =3D {
> > +     { NVME_REG_CAP,         "cap",          64 },
> > +     { NVME_REG_VS,          "version",      32 },
>
> Why don't we just go with "vs" instead of full name of it just like
> the others.

I tried to imitate the output of 'nvme show-regs'.

> > +     { NVME_REG_INTMS,       "intms",        32 },
> > +     { NVME_REG_INTMC,       "intmc",        32 },
> > +     { NVME_REG_CC,          "cc",           32 },
> > +     { NVME_REG_CSTS,        "csts",         32 },
> > +     { NVME_REG_NSSR,        "nssr",         32 },
> > +     { NVME_REG_AQA,         "aqa",          32 },
> > +     { NVME_REG_ASQ,         "asq",          64 },
> > +     { NVME_REG_ACQ,         "acq",          64 },
> > +     { NVME_REG_CMBLOC,      "cmbloc",       32 },
> > +     { NVME_REG_CMBSZ,       "cmbsz",        32 },
>
> If it's going to support optional registers also, then we can have
> BP-related things (BPINFO, BPRSEL, BPMBL) here also.

I'm going to change the register dump in binary format just like
'nvme show-regs -o binary' does.  So we'll have registers from 00h to 4Fh.