Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp1565217yba; Thu, 9 May 2019 19:44:37 -0700 (PDT) X-Google-Smtp-Source: APXvYqxrkHGaeEjHYQ4IKZaPeliEz+Q4/FtzCzhvtvQPCA96DZl1cAu5WzM6JFaiXx6rtouPhCWx X-Received: by 2002:a17:902:2924:: with SMTP id g33mr9905679plb.26.1557456276946; Thu, 09 May 2019 19:44:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557456276; cv=none; d=google.com; s=arc-20160816; b=Gx6QL82Yx4Spt95g8f75kOJAESTvsGP5Wwv60cbxVEDd/MH5tqCa1L1Zb78U+dsYvj kviuJHw9e6AI6EnNdFrQNOhf/to+cv4TH+14Y147ljFpiCHRA7PpfZqdzae2NLm2voVF S/pGWXIVCblQPt2w3g5IqMJkfii/d45x8u9dXbd51WBmckMy5wXawYMIRmEBZT3Mg1O0 F1Ztd7hBRuZfFD6zdrP0+UaitSd76hAo7a3S6sTXM4KNyMW3COo2WGSppHtWBNmNuMnV hNU+r7fHS/o20zk/DEK8ATC/2GcJEUUi4Llp+qf+Lrhgf5gdJ4lVjRvun6fjwGS8kRrB /M/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=MF1UCO5bTChTuEYNp7EthZ7Np9WuU5K34Hegj1HgMEA=; b=SQLZW4CJh4aplXDdimSFHIJpSn7djjQS97Dm3Ot1k+iWHhxLaQVRbEXJzm+Ro+U8mr yJoJTSRHf9I6v82tF6UMlfpkc80tIX4hlXmrHbyhqtsHEvmoH703vZktZUg59vYveybl FhPDOMn94+Kqj2iRuVXgmewYMN54MoZ6botTBkkMLr7a1unEQNLg6zr4apIYwmuJNP0n SgcMVTygYe/6N2alRX5vj+Xi4ztl3K5RdsvlkNFrqOw6Kil8zDEKvyVYYbSEv21sLs13 8sb1GNx0x8PkzUspPJk+l+hITuG0ydNTtQZFqRC1sf4drOSWSeY/vbiZ5OJL+5e7hE5z OTqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=1EUSEGfL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a6si5153299pls.407.2019.05.09.19.44.20; Thu, 09 May 2019 19:44:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=1EUSEGfL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726981AbfEJCmy (ORCPT + 99 others); Thu, 9 May 2019 22:42:54 -0400 Received: from mail.kernel.org ([198.145.29.99]:55006 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726806AbfEJCmx (ORCPT ); Thu, 9 May 2019 22:42:53 -0400 Received: from dragon (98.142.130.235.16clouds.com [98.142.130.235]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4708E20645; Fri, 10 May 2019 02:42:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1557456173; bh=pZ/RYhQiiXIobOqGJuOmMUFqoqiojXjUHDEaqT4DJ7k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=1EUSEGfLrYMAEAVek3nO0AAeZnER9ELE2yjPxiIqL5XMPgas/6nyjek8DCuJ+kOyJ uYzAjeS50aEtM/vdV89aQX8QO0voL7+I6wxLHbPQ1USI7EuB7PnBB2mXHQjEy2ZQ2z 2vH97kNHNhvpvV92QMpq8An5OaGaDQzxEyVcZQ2Y= Date: Fri, 10 May 2019 10:42:17 +0800 From: Shawn Guo To: Leonard Crestez Cc: Anson Huang , "stefan.wahren@i2se.com" , "enric.balletbo@collabora.com" , "linux-kernel@vger.kernel.org" , "heiko@sntech.de" , "marc.w.gonzalez@free.fr" , "ezequiel@collabora.com" , "catalin.marinas@arm.com" , "s.hauer@pengutronix.de" , "will.deacon@arm.com" , Abel Vesa , "bjorn.andersson@linaro.org" , Andy Gross , "jagan@amarulasolutions.com" , "kernel@pengutronix.de" , dl-linux-imx , "olof@lixom.net" , "horms+renesas@verge.net.au" , "festevam@gmail.com" , "robh@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "l.stach@pengutronix.de" Subject: Re: [PATCH 1/2] soc: imx-sc: add i.MX system controller soc driver support Message-ID: <20190510024215.GA15856@dragon> References: <1554965048-19450-1-git-send-email-Anson.Huang@nxp.com> <20190421073958.GC19962@dragon> <20190421074152.GD19962@dragon> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 22, 2019 at 08:48:56AM +0000, Leonard Crestez wrote: > On 4/22/2019 9:46 AM, Anson Huang wrote: > >> -----Original Message----- > >> From: Anson Huang > >>> From: Shawn Guo [mailto:shawnguo@kernel.org] > >>> On Sun, Apr 21, 2019 at 03:40:00PM +0800, Shawn Guo wrote: > >>>> On Thu, Apr 11, 2019 at 06:49:12AM +0000, Anson Huang wrote: > >>>>> i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller > >>>>> inside, the system controller is in charge of controlling power, > >>>>> clock and fuse etc.. > >>>>> > >>>>> This patch adds i.MX system controller soc driver support, Linux > >>>>> kernel has to communicate with system controller via MU (message > >>>>> unit) IPC to get soc revision, uid etc.. > >>>>> > >>>>> With this patch, soc info can be read from sysfs: > >>>>> > >>>>> drivers/soc/imx/Kconfig | 7 ++ > >>>>> drivers/soc/imx/Makefile | 1 + > >>>>> drivers/soc/imx/soc-imx-sc.c | 220 > >>>>> +++++++++++++++++++++++++++++++++++++++++++ > >>>>> 3 files changed, 228 insertions(+) create mode 100644 > >>>>> drivers/soc/imx/soc-imx-sc.c > >>>> > >>>> Rather than creating a new driver, please take a look at Abel's > >>>> generic > >>>> i.MX8 SoC driver, and see if it can be extended to cover i.MX8QXP. > >> > >> Got it, I didn't notice that this patch bas been accepted, I will redo the patch > >> based on it, thanks. > > > > I have sent the new patch set to support i.MX8QXP SoC revision based on generic i.MX8 > > SoC driver, however, the Kconfig modification is NOT good, it may break i.MX8MQ if IMX_SCU > > is NOT enabled, although we can add some warp function for SCU firmware API call to fix it, > > but after further thought and discussion with Dong Aisheng, I think we may need to roll back to > > use this patch series to create a new SoC driver dedicated for i.MX8 SoCs > > with system controller inside, such as i.MX8QXP, i.MX8QM etc., the reason are as below: > > > > For i.MX8MQ/i.MX8MM: > > 1. SoC driver does NOT depends on i.MX SCU firmware, so no need to use platform driver > > probe model, just device_init phase call is good enough; > > 2. The SoC driver no need to depends on IMX_SCU, so it can be always built in, no need to > > check IMX_SCU config; > > 3. The fuse check for CPU speed grading, HDCP status, NoC settings etc. could be added to this driver, > > but they are ONLY for i.MX8MQ/i.MX8MM etc.. > > For i.MX8QXP/i.MX8QM: > > 1. SoC driver MUST depends on IMX_SCU; > > 2. MUST use platform model to support defer probe; > > 3. No fuse check for CPU speed grading. > > > > So, I guess the reused code for i.MX8MQ and i.MX8QXP is ONLY those part of creating SoC id device node (less than > > 30% I think), all other functions are implemented in total different ways, that is why I created the imx_sc_soc driver > > in this patch series, so do you think we can add new SoC driver for i.MX8 SoC with SCU inside? Putting 2 different architecture > > SoCs' driver into 1 file looks like NOT making enough sense. > > +1 for separate SOC driver. The 8mq/8mm and 8qm/8qxp families are very > different, they just happen to share the imx8 prefix. > > It makes sense to allow people to compile one without the other and this > is easier with distinct SOC drivers. Leonard, Abel, Can you guys help review the patch? Thanks. Shawn