Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp6099570yba; Tue, 14 May 2019 01:29:24 -0700 (PDT) X-Google-Smtp-Source: APXvYqycb4ktGeHBOWizJVv+HlLo0BYpf9HwwEEqhZtHD9O1VBP8eM9PRQaO7+FgIBwUSH8W3CcL X-Received: by 2002:a17:902:7e4f:: with SMTP id a15mr36750691pln.205.1557822564269; Tue, 14 May 2019 01:29:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557822564; cv=none; d=google.com; s=arc-20160816; b=iyArHO/qJ2sTF+WJVV5BSjHrNc6VkG3o2Mm4BqbgMnydj/sxegHXJ9VYCnhQww9OP3 6D2FYr37nTdUU0k767Ess+3Z8/tctHjFDuBckYotOt3HEqcW3Dfi4MpXSyED74eUUEKG w/DotgV/KzdSD7iRzpNbkN/u/zXd46UtcSy6RfL68bmUBp424ShCpzGNS0duHVC6Jpdn nxVyHYckOzels8bxHy5E1RuHUcKqL7xgicOKRtVretPaFJQB565kvYtCbOQk9Cejzuj9 KA3p0PNO64DkOOV7Tu7N62tHR4LZXjSN3GZpRtIptQN3HVdhCEH/eHspYAaSwv87OOma mtVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=cSw7dbXcAbS5Q/0FeaUhUZjqh7E4PIut1NGw2jFxHQc=; b=hl40EUcBSS/AtKdaZcsM1vjoODm9EAAEVwSV0cf4zlxi485tCEsPfW0HkkQZ1fTXuh MJiNU1GpHYhq0KhCmIs15VeKta0PrrySdkWaDm5si+twmy18yPZsdV32/nEx5kgAE1Sa mqWGK6vCTyvJSJNokjwV6SJBErIAuF7Ga8MLiQug9yDM3yB0RvsVnwrMuJ0xuImYHPoi WpCe7g1SJTaZXjg48+QLIs5XMebXVJFdWuQ5lb75/diK2DpWu1SrAeqqRuKXIkPq7vaa 650KHHlZ8uFd6ZKlkzl1kTHeb8ry2wirqI42UNqvV6m4PJst8gTXY2SuFRKMwqs4g7XV Eh9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=RbfAZWNa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a66si21507370pfb.210.2019.05.14.01.29.09; Tue, 14 May 2019 01:29:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=RbfAZWNa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726772AbfENI1g (ORCPT + 99 others); Tue, 14 May 2019 04:27:36 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:59152 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726148AbfENI1c (ORCPT ); Tue, 14 May 2019 04:27:32 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4E8Q8xp029562; Tue, 14 May 2019 10:27:08 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=cSw7dbXcAbS5Q/0FeaUhUZjqh7E4PIut1NGw2jFxHQc=; b=RbfAZWNaTw7ekn4Qvx6XDaQ9kqvaprs9BUC9VSJL84SFK4sSm4IYGB51dn7AVuELdKoP JSLiGo8Fmqbtkb59Zu0MpxjzII8Uvb6kOpnhQnrURRAMdVfldmCuTLq+IdVrZkk1eDgv gcWXN1t+8q2Bs9CVPZ2C7eIGkBEZnSfZEPbP5eDejPJeEuWjC2uT5p2GFDtUUyDHvBFQ 20//UDlxX1gc5+EWb3v/UiVhVHOhGayDDMnxANEaOvvpz+sYlUclC0+XaQPUSH0W9JS6 XA6upeebVf4E7YerIPeavihghI6g1hWcVEekqpgFqlBZ2R84MtOZV7lznn3YJb8dip9A sQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2sdkuyqnmk-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 14 May 2019 10:27:08 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B86A434; Tue, 14 May 2019 08:27:07 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7E2C81551; Tue, 14 May 2019 08:27:07 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 14 May 2019 10:27:07 +0200 Received: from localhost (10.201.23.25) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 14 May 2019 10:27:06 +0200 From: Fabien Dessenne To: Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Ohad Ben-Cohen , Bjorn Andersson , , , , , CC: Fabien Dessenne , Loic Pallardy , Arnaud Pouliquen , "Ludovic Barre" , Benjamin Gaignard Subject: [PATCH v4 0/8] stm32 m4 remoteproc on STM32MP157c Date: Tue, 14 May 2019 10:26:55 +0200 Message-ID: <1557822423-22658-1-git-send-email-fabien.dessenne@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.25] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-05-14_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org STMicrolectronics STM32MP157 MPU are based on a Dual Arm Cortex-A7 core and a Cortex-M4. This patchset adds the support of the stm32_rproc driver allowing to control the M4 remote processor. Changes since v3: -Replaced "st,auto_boot" with "st,auto-boot" -Update m4 reg values and align with unit-address Changes since v2: - Clarified "reg" description - Change m4 unit adress to 38000000 - Renamed "auto_boot" in "st,auto-boot" Changes since v1: - Gave details about the memory mapping (in bindings). - Used 'dma-ranges' instead of 'ranges'. - Updated the 'compatible' property. - Remove the 'recovery', 'reset-names' and 'interrupt-names' properties. - Clarified why / when mailboxes are optional. Fabien Dessenne (8): dt-bindings: stm32: add bindings for ML-AHB interconnect dt-bindings: remoteproc: add bindings for stm32 remote processor driver remoteproc: stm32: add an ST stm32_rproc driver ARM: dts: stm32: add m4 remoteproc support on STM32MP157c ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1 ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1 ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1 ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1 .../devicetree/bindings/arm/stm32/mlahb.txt | 37 ++ .../devicetree/bindings/remoteproc/stm32-rproc.txt | 63 +++ arch/arm/boot/dts/stm32mp157a-dk1.dts | 52 ++ arch/arm/boot/dts/stm32mp157c-ed1.dts | 52 ++ arch/arm/boot/dts/stm32mp157c.dtsi | 20 + drivers/remoteproc/Kconfig | 15 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/stm32_rproc.c | 628 +++++++++++++++++++++ 8 files changed, 868 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/stm32/mlahb.txt create mode 100644 Documentation/devicetree/bindings/remoteproc/stm32-rproc.txt create mode 100644 drivers/remoteproc/stm32_rproc.c -- 2.7.4