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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id h15sm12343642wru.52.2019.05.14.07.26.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 07:26:56 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/8] arm64: dts: meson: g12a: add audio memory arbitrer Date: Tue, 14 May 2019 16:26:43 +0200 Message-Id: <20190514142649.1127-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190514142649.1127-1-jbrunet@baylibre.com> References: <20190514142649.1127-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the audio DDR memory arbitrer of the g12a SoC family. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index 09aa024d9f0e..2d5bccad4035 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -707,6 +708,14 @@ resets = <&reset RESET_AUDIO>; }; + + arb: reset-controller@280 { + status = "disabled"; + compatible = "amlogic,meson-axg-audio-arb"; + reg = <0x0 0x280 0x0 0x4>; + #reset-cells = <1>; + clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; + }; }; usb3_pcie_phy: phy@46000 { -- 2.20.1