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[209.132.180.67]) by mx.google.com with ESMTP id 132si5248870pgb.210.2019.05.14.09.13.40; Tue, 14 May 2019 09:13:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YmXRWFM7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726551AbfENQLz (ORCPT + 99 others); Tue, 14 May 2019 12:11:55 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:42545 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726362AbfENQLz (ORCPT ); Tue, 14 May 2019 12:11:55 -0400 Received: by mail-lf1-f65.google.com with SMTP id y13so2517404lfh.9 for ; Tue, 14 May 2019 09:11:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=PFgQt6BW2pIoMsM0lCcv9vdjEyov9kr04yFP2mWeZfM=; b=YmXRWFM7VxahkVGZN3+5ZvbjiZ09JClcYGdbAQxSqxO449WgZ2BzdVLc3XU/4bvo3V dWnluPTo2V6V2ArC6gmUMDcJADsW4Y4/P6s+uNNXudme6j/TUkNjmDHo3qg5KMnOVipK epTijDwOTpV7gwKUW/w8mGmR/mgxMYoMdNS20QjcmgD6ONOuw3iWrR/NLoH/6lpJsPzl awDuQp4UU5IQsPMgD63VYMBDwVNqWM6qoiLUBwRAZnwNzUIRj1FhdMJ8znml+RUoL/iy /03cpZXc+liWkKM7CZMbC8f8belR2Xa4+ptHQA+VSFF5j5VxdMRCefmlGbNNeM13grD+ 8lcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=PFgQt6BW2pIoMsM0lCcv9vdjEyov9kr04yFP2mWeZfM=; b=Wif33PJ8N/ximjBmBhMikqC7qP0pcV0JfHlIxv9OQ7g3i7aewflzM6YBOMPJB7CGz9 eWHyVcxn7xgFq5ztcNH8ihg5ZZG8iIVpm9T1+MdJ7TqTFBNSmI5dkQd33Hz8r2VsLy2L x6fQMo0QEzz0TcvZIOSfO2MrH8Uv5g0gyrGJDcz/zhPYNHKB6iW75gUCb0Wfb45xTib/ 6uwvqULcU2BSpo7ecnh7Q0YbN7yJx0c7nlrzwGfxsNfZnp3uTNz7LByMrt4o5+Qq2bNS tiknZcmm0lYOn031dGkOmw6FTUyghGv8QeGC3i/KGWwQl+Pgf746LImzxIvl0IkHI+HQ Iwmw== X-Gm-Message-State: APjAAAVNWVqHoghB9R/HVqbIwEESWxodD4wrfPGASSd17PkY4ujUu37w ZLxhF9GUuPorsFtcZy63uw271A== X-Received: by 2002:ac2:4899:: with SMTP id x25mr13100139lfc.44.1557850314156; Tue, 14 May 2019 09:11:54 -0700 (PDT) Received: from centauri.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id s26sm3588430ljj.52.2019.05.14.09.11.53 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 14 May 2019 09:11:53 -0700 (PDT) Date: Tue, 14 May 2019 18:11:51 +0200 From: Niklas Cassel To: Amit Kucheria Cc: Linux Kernel Mailing List , linux-arm-msm , Bjorn Andersson , Andy Gross , David Brown , Li Yang , Shawn Guo , devicetree , Linux ARM Subject: Re: [PATCHv1 0/8] qcom: Add cpuidle to some platforms Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.11.4 (2019-03-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 10, 2019 at 04:59:38PM +0530, Amit Kucheria wrote: > Fix up a few entry-method="psci" issues and then add cpuidle low power > states for msm8996, msm8998, qcs404, sdm845. All these have been tested > to only make sure that the C-states are entered from Linux point-of-view. > > We will continue to add more states and make power measurements to tweak > some of these numbers, but getting these merged will allow other people to > use these platforms to work on cpuidle, eas and related topics. Hello Amit, Your subject looks a bit weird: [PATCHv1 0/8] qcom: Add cpuidle to some platforms No need to specify reroll count if it is the first version, and there is usually a space between PATCH and reroll count. git format-patch [(--reroll-count|-v) ] it should take care of this for you. Please also add all that is on either to: or cc: in any patch in the series as cc: for the cover letter. Kind regards, Niklas > > > Amit Kucheria (6): > arm64: dts: Fix various entry-method properties to reflect > documentation > Documentation: arm: Link idle-states binding to code > arm64: dts: qcom: msm8916: Add entry-method property for the > idle-states node > arm64: dts: qcom: msm8916: Use more generic idle state names > arm64: dts: qcom: msm8996: Add PSCI cpuidle low power states > arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states > > Niklas Cassel (1): > arm64: dts: qcom: qcs404: Add PSCI cpuidle low power states > > Raju P.L.S.S.S.N (1): > arm64: dts: qcom: sdm845: Add PSCI cpuidle low power states > > .../devicetree/bindings/arm/idle-states.txt | 7 +++ > .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 13 ++-- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 28 +++++++++ > arch/arm64/boot/dts/qcom/msm8998.dtsi | 32 ++++++++++ > arch/arm64/boot/dts/qcom/qcs404.dtsi | 18 ++++++ > arch/arm64/boot/dts/qcom/sdm845.dtsi | 62 +++++++++++++++++++ > 7 files changed, 156 insertions(+), 6 deletions(-) > > -- > 2.17.1 >