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[209.132.180.67]) by mx.google.com with ESMTP id f3si3031793pgs.135.2019.05.15.14.19.41; Wed, 15 May 2019 14:19:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@googlemail.com header.s=20161025 header.b=lxiRTmNO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726913AbfEOVS3 (ORCPT + 99 others); Wed, 15 May 2019 17:18:29 -0400 Received: from mail-ot1-f66.google.com ([209.85.210.66]:42866 "EHLO mail-ot1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726547AbfEOVS3 (ORCPT ); Wed, 15 May 2019 17:18:29 -0400 Received: by mail-ot1-f66.google.com with SMTP id f23so1408005otl.9; Wed, 15 May 2019 14:18:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=KECxhG00vBm0IlDH9n6KSnmJxztUTqeZiXx2Brec6f4=; b=lxiRTmNOWVZoT2dnKAkBE35aDOk0GpZXsTGuC/FrYuP4RFUSpzz6R4+NBThg8+7Caq FlqWM2pP9jcBvRD6saFfOMWkCHzRc1E18PMXTwKslca5pVeoIHTG/yn90g+1xn5lTV0t cTbe2XWURr41z9tc0od/mJbjPb7jnWdwYSVP9P71J4dF4GeSFzh0f5hEoscDHNtaNPxo bLI2In6ZENqM9Tlp9NfLSQ5eKXxinuapLsYOkFuGqd3wCCTQw1xZEvupjlx+7VL2DPXc iSEpXXk48IgJIxWDu66zafTBGCh4hisAMnd0cYOKcniZvGduISlfqnJyCewQt9gLYUfn PuMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=KECxhG00vBm0IlDH9n6KSnmJxztUTqeZiXx2Brec6f4=; b=NDNpP+5mX5dDElxaXhk2vW5jb/epoZ6SDIQGoJDLeggsGAe9rHck5WVdbTMusLOYVW 1yRrfEC0McbGig25MYvSl94ceR2yPcHfogsiQG/BlMbaDyVVznJnRnCKbR6bXN6g7J6s Evj1jpfP3ctB19MucsUeI5GvQYUb+zc9S0WumdwCSJRjEiQ4m4ep8TXHLqUob0bDsZxO hg9SGDtEKPbDiZ9/zjU75HQFv/ztV5TchNEDiTn+PI8ze69N8bn+i9dqY6jEZirsMnFZ aaPayHNf+WyUxvX/Z1wrfBZRDGRfPnqSDUtgd+6e+3nuf/XDBLbNP8svjzmkTq/8N8Y0 zICQ== X-Gm-Message-State: APjAAAWd9n7qR6VpKPep4ymcERFSjTlM2rHWTsCF4Nv0uM+ehv9C02Z6 fyCgQ5idjJF4dOoLEKzhkY+youaQQEb2r93tTyo= X-Received: by 2002:a9d:5618:: with SMTP id e24mr3459779oti.38.1557955108329; Wed, 15 May 2019 14:18:28 -0700 (PDT) MIME-Version: 1.0 References: <20190513091548.16674-1-narmstrong@baylibre.com> <20190513091548.16674-3-narmstrong@baylibre.com> In-Reply-To: From: Martin Blumenstingl Date: Wed, 15 May 2019 23:18:17 +0200 Message-ID: Subject: Re: [PATCH 2/3] mmc: meson-gx: add ddr-access-quirk To: Neil Armstrong Cc: ulf.hansson@linaro.org, khilman@baylibre.com, baylibre-upstreaming@groups.io, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Neil, On Wed, May 15, 2019 at 2:45 PM Neil Armstrong wrote: > > On 14/05/2019 19:58, Martin Blumenstingl wrote: > > Hi Neil, > > > > On Mon, May 13, 2019 at 11:16 AM Neil Armstrong wrote: > > [...] > >> @@ -1158,15 +1183,27 @@ static int meson_mmc_probe(struct platform_device *pdev) > >> */ > >> mmc->caps2 &= ~MMC_CAP2_HS400; > >> > >> - /* data bounce buffer */ > >> - host->bounce_buf_size = mmc->max_req_size; > >> - host->bounce_buf = > >> - dma_alloc_coherent(host->dev, host->bounce_buf_size, > >> - &host->bounce_dma_addr, GFP_KERNEL); > >> - if (host->bounce_buf == NULL) { > >> - dev_err(host->dev, "Unable to map allocate DMA bounce buffer.\n"); > >> - ret = -ENOMEM; > >> - goto err_free_irq; > >> + if (host->ddr_access_quirk) { > >> + /* > >> + * The MMC Controller embeds 1,5KiB of internal SRAM > >> + * that can be used to be used as bounce buffer. > >> + * In the case of the G12A SDIO controller, use these > >> + * instead of the DDR memory > >> + */ > >> + host->bounce_buf_size = SD_EMMC_SRAM_DATA_BUF_LEN; > >> + host->bounce_buf = host->regs + SD_EMMC_SRAM_DATA_BUF_OFF; > >> + host->bounce_dma_addr = res->start + SD_EMMC_SRAM_DATA_BUF_OFF; > > I'm curious: why do you need to set bounce_dma_addr in this case? > > We still need the physical bounce buffer address since we write in the registers, so writing bounce_dma_addr to SD_EMMC_CMD_DAT is needed to make it work? > and we need the logical address to memcpy() in the buffer. as far as I understand that is what we use the "bounce_buf" member for, but I don't see why we need "bounce_dma_addr" > > > >> + } else { > >> + /* data bounce buffer */ > >> + host->bounce_buf_size = mmc->max_req_size; > >> + host->bounce_buf = > >> + dma_alloc_coherent(host->dev, host->bounce_buf_size, > >> + &host->bounce_dma_addr, GFP_KERNEL); > >> + if (host->bounce_buf == NULL) { > >> + dev_err(host->dev, "Unable to map allocate DMA bounce buffer.\n"); > >> + ret = -ENOMEM; > >> + goto err_free_irq; > >> + } > >> } > >> > >> host->descs = dma_alloc_coherent(host->dev, SD_EMMC_DESC_BUF_LEN, > > if host->descs cannot be allocated then you need to conditionally skip > > dma_free_coherent for the bounce buffer in the goto err_bounce_buf > > case a few lines below (just like you did in meson_mmc_remove) > > It can be allocated, it's only useless. I can skip it but I don't want > to break any logic in the driver. I wasn't clear in my last email, I meant this error case: err_bounce_buf: dma_free_coherent(host->dev, host->bounce_buf_size, ... when host->ddr_access_quirk is true then you skip the dma_alloc_coherent call for bounce_buf Martin