Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp2037552yba; Fri, 17 May 2019 09:21:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqwcCTZ8kODrIgdVghJkG0VUDdNZN26NJq9QtxOons/3nXnIvawQHXlPSkjCPf33Dq7wsxiI X-Received: by 2002:a63:d345:: with SMTP id u5mr54663314pgi.83.1558110084906; Fri, 17 May 2019 09:21:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558110084; cv=none; d=google.com; s=arc-20160816; b=GestSIvSNP6WBmGKe8/JGQRMNjCLP/5Y2aOSvhpVxcxR7XmDv2zsTVxkONvQolB17e CYhid+pe5UsJ72pZ4uh2Kjw1AVjmx5naVAFDNLZ+t1k49N6gB7OtEohN/JnkFToiOQwY rNpJ2cFhDg+E5Cz1x1oKynDPXBmL4htqwi+fkftu6saIshM8bHWMgKu/XUg8+unAs6uM PybsJO6PfhYbZqLLawOg4/Zfo0APgic6HuZZWy9YxmZ3dNbUpIfAn5iInogScAJjCck0 mg7WXJhvnjj1TAot4nKr8uCSv1rhuYJ/5/fOgdW4WCKARjNE6eBOZIUztc2ncF55Fggt AsCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-transfer-encoding:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=V5NvcGghIj0dpCl/PALC2bHoiRO1Oy7z86sXmeMzFH8=; b=kEJ0JEeN+pMnqSIfSOMsrQ0pWmPZfPxc2Ud6Y8WxdfiYyliEsVu1ybOekVCTeT59wD 3mVkEI6ECg7+hKpLfXwDWwOCwaLbFxhm1F7pIqkjKkwEzcFg0mg49fYvQMsfeD9C+iDn YR+xm5DIG3e1rvPCxTy6R6WxZl7wxd1/4G/X7wfnl2BFtoNl8Rs5Vlgi1ddRcmAV9shd 3wSv13X+2CDQFVVmj23X6gpVwv1dIFIEqVhHkiaXqE1pw8KdzqWoYVVcnT2o5LwklKR9 nJ69KD8XYvoJIql3e2ZauOVNd+giNZl+2hr2UuEKQq6nSo27JC/sUU66NS30wfb/cuOI jJOg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c14si8455953pgh.367.2019.05.17.09.21.07; Fri, 17 May 2019 09:21:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729432AbfEQQNZ (ORCPT + 99 others); Fri, 17 May 2019 12:13:25 -0400 Received: from foss.arm.com ([217.140.101.70]:45316 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729032AbfEQQNZ (ORCPT ); Fri, 17 May 2019 12:13:25 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 21C5F1715; Fri, 17 May 2019 09:13:25 -0700 (PDT) Received: from e110455-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C1C343F575; Fri, 17 May 2019 09:13:24 -0700 (PDT) Received: by e110455-lin.cambridge.arm.com (Postfix, from userid 1000) id 1351468240D; Fri, 17 May 2019 17:13:23 +0100 (BST) Date: Fri, 17 May 2019 17:13:23 +0100 From: "liviu.dudau@arm.com" To: Wen He Cc: Robin Murphy , "dri-devel@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , Leo Li Subject: Re: [EXT] Re: [v1] drm/arm/mali-dp: Disable checking for required pixel clock rate Message-ID: <20190517161322.GE15144@e110455-lin.cambridge.arm.com> References: <20190515024348.43642-1-wen.he_1@nxp.com> <3f87b2a7-c7e8-0597-2f62-d421aa6ccaa5@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.11.4 (2019-03-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 17, 2019 at 10:37:01AM +0000, Wen He wrote: > > > > -----Original Message----- > > From: Robin Murphy [mailto:robin.murphy@arm.com] > > Sent: 2019年5月16日 18:45 > > To: Wen He ; dri-devel@lists.freedesktop.org; > > linux-kernel@vger.kernel.org; liviu.dudau@arm.com > > Cc: Leo Li > > Subject: Re: [EXT] Re: [v1] drm/arm/mali-dp: Disable checking for required > > pixel clock rate > > > > > > On 16/05/2019 10:42, Wen He wrote: > > > > > > > > >> -----Original Message----- > > >> From: Robin Murphy [mailto:robin.murphy@arm.com] > > >> Sent: 2019年5月16日 1:14 > > >> To: Wen He ; dri-devel@lists.freedesktop.org; > > >> linux-kernel@vger.kernel.org; liviu.dudau@arm.com > > >> Cc: Leo Li > > >> Subject: [EXT] Re: [v1] drm/arm/mali-dp: Disable checking for > > >> required pixel clock rate > > >> > > >> Caution: EXT Email > > >> > > >> On 15/05/2019 03:42, Wen He wrote: > > >>> Disable checking for required pixel clock rate if ARCH_LAYERSCPAE is > > >>> enable. > > >>> > > >>> Signed-off-by: Alison Wang > > >>> Signed-off-by: Wen He > > >>> --- > > >>> change in description: > > >>> - This check that only supported one pixel clock required clock > > rate > > >>> compare with dts node value. but we have supports 4 pixel clock > > >>> for ls1028a board. > > >>> drivers/gpu/drm/arm/malidp_crtc.c | 2 ++ > > >>> 1 file changed, 2 insertions(+) > > >>> > > >>> diff --git a/drivers/gpu/drm/arm/malidp_crtc.c > > >>> b/drivers/gpu/drm/arm/malidp_crtc.c > > >>> index 56aad288666e..bb79223d9981 100644 > > >>> --- a/drivers/gpu/drm/arm/malidp_crtc.c > > >>> +++ b/drivers/gpu/drm/arm/malidp_crtc.c > > >>> @@ -36,11 +36,13 @@ static enum drm_mode_status > > >>> malidp_crtc_mode_valid(struct drm_crtc *crtc, > > >>> > > >>> if (req_rate) { > > >>> rate = clk_round_rate(hwdev->pxlclk, req_rate); > > >>> +#ifndef CONFIG_ARCH_LAYERSCAPE > > >> > > >> What about multiplatform builds? The kernel config doesn't tell you > > >> what hardware you're actually running on. > > >> > > > > > > Hi Robin, > > > > > > Thanks for your reply. > > > > > > In fact, Only one platform integrates this IP when > > CONFIG_ARCH_LAYERSCAPE is set. > > > Although this are not good ways, but I think it won't be a problem under > > multiplatform builds. > > > > My point is that ARCH_LAYERSCAPE is going to be enabled in distribution > > kernels along with everything else, so you're effectively removing this check for > > all other vendors' Mali-DP implementations as well, which is probably not OK. > > > > Furthermore, if LS1028A really only supports 4 specific modes as the BSP > > documentation I found claims, then surely you'd want a *more* specific check > > here, rather than no check at all? > > Hi Robin, > > Thanks for your comments. > > Yes, As you said, now LS1028A only supports 4 modes, and we use three clocks to support > all four modes. In fact, this was really the point. > > However, we can only enable one mode to meet the check statement in this place. > > For example, If user has a 1080p monitor, we must be set the pixel fixed-clock to 148.5MHz. > if user want to choice 4k monitor, we also to be change the pixel fixed-clock to 594MHz in > DT node. In reality, We have no way of knowing what kind of monitor the user wants. Right? How does your DT know which monitor the user is going to plug in? Like I've said, if you expose the mechanism you use to set the fixed-clock to a certain value via the clk provider then you will be able to switch automatically to that frequency without your patch. Best regards, Liviu > > Moreover, user cannot to change screen resolution in this case, I don't think this place is > reasonable. we need to supporting Ubuntu , Wayland and other embedded GU, so we need > to switch the resolutions. > > Maybe it's that most android device used, and android system always only need one > resolution. > > Best Regards, > Wen > > > > > Robin. -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯