Received: by 2002:a25:4158:0:0:0:0:0 with SMTP id o85csp2244918yba; Fri, 17 May 2019 13:14:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqzKJ7flArSkRBZ8oOcv+/Wjufu233RbT0HbI5d8h1f86GwBfXSGfu9jRAc7qIEuGZHyJwWe X-Received: by 2002:aa7:930e:: with SMTP id 14mr6184048pfj.262.1558124079519; Fri, 17 May 2019 13:14:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558124079; cv=none; d=google.com; s=arc-20160816; b=A9s4Rf1htQDbsyYibUiOVxRSFeDWy1OZP1FLlGo5BlMZxorj/eWYlCvVBF13jMd7Dy 3QvU4HQQsRlVKVUJrojVqSovUTkO33ZoLAbBGWq8iQPV+u/mrZnC7OUkSQPfMIgwdHJ5 mNPmIKn5ugqPytxR23DWsgdmSVsrnvOX0AY59CNhMD4/XjMgkFM+PFJuX0jU655iVvfi yx0oxDRHrxOB1j95IHxEmEngp7ch3bPEjfHDxbQNzmNwGnvaPjNE+YxuWVVUX+7CDOzN F0nSwiBl1hOJLayv5RsrI0mZyZqY13t16hhAyIJieleESZIuJSVfXLBNF0Fj8c2836Ba Rwqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=Evt3MaoYj/j1VBPkMSPryYEmwg5c78Fr7i8NGa5Qan3hi+ApOXtfJvtdU/kPywWtze 15H5pLw4XwwRVHJuyEliAMtHqfAbSYcut5O+BS9Xv4VD8fOj3CUwu1KHPe+3x/CD/9uU VIB0pqhKbkJIW8CfeOAKJpWrHsxdocDSz2w1z/4SEYfWtFyo02gTZodFe8rINyvaDmst k/3Tjb/BDOkqfr5ZZP1q5dzCGVPVA9fkQyU8OrsWReO1w786ksw0SyQg7x0OL/VRF3Nl VOM17tABILiSTTIE+fWCNFgh2uQzaB04ZC4zM0b+9e/WQDsZ5kdkEpYVGLUuRJgfCMUP UkUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="mMauM/oR"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 1si8954947pgx.176.2019.05.17.13.14.24; Fri, 17 May 2019 13:14:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="mMauM/oR"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729173AbfEQSrQ (ORCPT + 99 others); Fri, 17 May 2019 14:47:16 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:38780 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727380AbfEQSrL (ORCPT ); Fri, 17 May 2019 14:47:11 -0400 Received: by mail-wr1-f66.google.com with SMTP id d18so8166269wrs.5; Fri, 17 May 2019 11:47:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=mMauM/oRgsPGZUvkUT/+QSTeGRj6V4+Bsa6SDx89DACsieftOUcfnpP0PEa41Y7jjx vXR0gKI35+II1451PFUMT8qwllnoMQCNopXWWgkKjmFkg97k9NkB0qyU/ITdLnqaNvhm 7824EGQbsW7XUYg+EzvF7fldSBjWgoGIYtjpilZkMG0t9WLhzSrvsol8kDo+K3T3NCbz PtKzNCbAtvYzjHxH1L/LnQ5cuh6R/Ykju94XenD6GIqKrMqbcTl7PRp9x84vws0jG24X O0reJu7XDq7JltXMnRyde6v/Fyx4Zr/oaaCH3CSZNg0MmhVKzYSpSwrgTvKQLNFPdlfF wbeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=qy2D90BVTc2c7vCID5TbQ1DPbCYSzbGm9zPli5JHlg3Q/PjUjFgKTHZjX/WGNP2IeE HIR5D8CPUUVmEOwLZUR8bBRyw6IXEWolBLJvsDtld/lBbe0jfMhnVfKfLTBJcEpTgMjq 7VaelTvNiHQUBUuTL2bNkLvbirsx/ly0L73kv9pAmJOtsrcY1GOaQUU42WjicW5MmWNk udcZ6u4KtRI+19VO/NeZ/XcONrasLOgLYl+Vob1CNB1BS5I+THvi6Ywc4yCWkDlMXnQA xLWhIgSYmNWNTGjwicGRlaOuY+YPEs4S8woVVa4exSU0cX6GnMgW3xEEco9IuC5uNicY vWpA== X-Gm-Message-State: APjAAAUlDQzNSinLtzWPVGPQIMB3PwoLJagdIX4u5UNM7Q7NkzBrCH2k OXkHgB0M8YXRhtez2lr7YZw= X-Received: by 2002:adf:eb03:: with SMTP id s3mr29605848wrn.170.1558118829632; Fri, 17 May 2019 11:47:09 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:1f1:d0f0::4e2b:d7ca]) by smtp.gmail.com with ESMTPSA id v20sm5801112wmj.10.2019.05.17.11.47.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 May 2019 11:47:08 -0700 (PDT) From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= To: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Tomeu Vizoso , Will Deacon , Robin Murphy , Joerg Roedel , Neil Armstrong , Steven Price Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Icenowy Zheng , =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= Subject: [PATCH v5 3/6] dt-bindings: gpu: add bus clock for Mali Midgard GPUs Date: Fri, 17 May 2019 20:46:56 +0200 Message-Id: <20190517184659.18828-4-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190517184659.18828-1-peron.clem@gmail.com> References: <20190517184659.18828-1-peron.clem@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Icenowy Zheng Some SoCs adds a bus clock gate to the Mali Midgard GPU. Add the binding for the bus clock. Signed-off-by: Icenowy Zheng Signed-off-by: Clément Péron Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 1b1a74129141..2e8bbce35695 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -31,6 +31,12 @@ Optional properties: - clocks : Phandle to clock for the Mali Midgard device. +- clock-names : Specify the names of the clocks specified in clocks + when multiple clocks are present. + * core: clock driving the GPU itself (When only one clock is present, + assume it's this clock.) + * bus: bus clock for the GPU + - mali-supply : Phandle to regulator for the Mali device. Refer to Documentation/devicetree/bindings/regulator/regulator.txt for details. -- 2.17.1