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From:   "james qian wang (Arm Technology China)" <james.qian.wang@arm.com>
To:     "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>
CC:     Liviu Dudau <Liviu.Dudau@arm.com>,
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        Brian Starkey <Brian.Starkey@arm.com>,
        "Julien Yin (Arm Technology China)" <Julien.Yin@arm.com>,
        "Jonathan Chai (Arm Technology China)" <Jonathan.Chai@arm.com>,
        Ayan Halder <Ayan.Halder@arm.com>,
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        nd <nd@arm.com>
Subject: Re: [PATCH v1 1/2] drm/komeda: Update HW up-sampling on D71
Thread-Topic: [PATCH v1 1/2] drm/komeda: Update HW up-sampling on D71
Thread-Index: AQHVDs/U4h0vo+oh40m7tROen1856A==
Date:   Mon, 20 May 2019 05:49:46 +0000
Message-ID: <20190520054940.GA2308@james-ThinkStation-P300>
References: <1557987170-24032-1-git-send-email-lowry.li@arm.com>
 <1557987170-24032-2-git-send-email-lowry.li@arm.com>
In-Reply-To: <1557987170-24032-2-git-send-email-lowry.li@arm.com>
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On Thu, May 16, 2019 at 02:13:09PM +0800, Lowry Li (Arm Technology China) w=
rote:
> Updates HW up-sampling method according to the format type.
>=20
> Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
> ---
>  .../gpu/drm/arm/display/komeda/d71/d71_component.c | 29 ++++++++++++++++=
++++++
>  1 file changed, 29 insertions(+)
>=20
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/dri=
vers/gpu/drm/arm/display/komeda/d71/d71_component.c
> index f8846c6..dfc70f5 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> @@ -212,6 +212,35 @@ static void d71_layer_update(struct komeda_component=
 *c,
>  		malidp_write32(reg, BLK_P1_PTR_HIGH, upper_32_bits(addr));
>  	}
> =20
> +	if (fb->format->is_yuv) {
> +		u32 upsampling =3D 0;
> +
> +		switch (kfb->format_caps->fourcc) {
> +		case DRM_FORMAT_YUYV:
> +			upsampling =3D fb->modifier ? LR_CHI422_BILINEAR :
> +				     LR_CHI422_REPLICATION;
> +			break;
> +		case DRM_FORMAT_UYVY:
> +			upsampling =3D LR_CHI422_REPLICATION;
> +			break;
> +		case DRM_FORMAT_NV12:
> +		case DRM_FORMAT_YUV420_8BIT:
> +		case DRM_FORMAT_YUV420_10BIT:
> +		case DRM_FORMAT_YUV420:
> +		case DRM_FORMAT_P010:
> +		/* these fmt support MPGE/JPEG both, here perfer JPEG*/
> +			upsampling =3D LR_CHI420_JPEG;
> +			break;
> +		case DRM_FORMAT_X0L2:
> +			upsampling =3D LR_CHI420_JPEG;
> +			break;
> +		default:
> +			break;
> +		}
> +
> +		malidp_write32(reg, LAYER_R_CONTROL, upsampling);
> +	}
> +
>  	malidp_write32(reg, LAYER_FMT, kfb->format_caps->hw_id);
>  	malidp_write32(reg, BLK_IN_SIZE, HV_SIZE(st->hsize, st->vsize));
> =20
> --=20
> 1.9.1
>=20
=20
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.co=
m>

Looks good to me.

Thank you