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From:   "james qian wang (Arm Technology China)" <james.qian.wang@arm.com>
To:     "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>
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Subject: Re: [PATCH] drm/komeda: Clear enable bit in CU_INPUTx_CONTROL
Thread-Topic: [PATCH] drm/komeda: Clear enable bit in CU_INPUTx_CONTROL
Thread-Index: AQHVDs+VxH/zdzE1+0KX0rb+TfXFjQ==
Date:   Mon, 20 May 2019 05:48:00 +0000
Message-ID: <20190520054753.GA2220@james-ThinkStation-P300>
References: <1557889313-31326-1-git-send-email-lowry.li@arm.com>
In-Reply-To: <1557889313-31326-1-git-send-email-lowry.li@arm.com>
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On Wed, May 15, 2019 at 11:02:05AM +0800, Lowry Li (Arm Technology China) w=
rote:
> Besides clearing the input ID to zero, D71 compiz also has input
> enable bit in CU_INPUTx_CONTROL which need to be cleared.
>=20
> Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
> ---
>  drivers/gpu/drm/arm/display/komeda/d71/d71_component.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
>=20
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/dri=
vers/gpu/drm/arm/display/komeda/d71/d71_component.c
> index 1135e38..f8846c6 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> @@ -435,8 +435,18 @@ static void d71_component_disable(struct komeda_comp=
onent *c)
> =20
>  	malidp_write32(reg, BLK_CONTROL, 0);
> =20
> -	for (i =3D 0; i < c->max_active_inputs; i++)
> +	for (i =3D 0; i < c->max_active_inputs; i++) {
>  		malidp_write32(reg, BLK_INPUT_ID0 + (i << 2), 0);
> +
> +		/* Besides clearing the input ID to zero, D71 compiz also has
> +		 * input enable bit in CU_INPUTx_CONTROL which need to be
> +		 * cleared.
> +		 */
> +		if (has_bit(c->id, KOMEDA_PIPELINE_COMPIZS))
> +			malidp_write32(reg, CU_INPUT0_CONTROL +
> +				       i * CU_PER_INPUT_REGS * 4,
> +				       CU_INPUT_CTRL_ALPHA(0xFF));
> +	}
>  }
> =20
>  static void compiz_enable_input(u32 __iomem *id_reg,
> --=20
> 1.9.1
>=20

Looks good to me.

Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.co=
m>