Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Date:   Mon, 20 May 2019 11:03:27 +0200
From:   Maxime Ripard <maxime.ripard@bootlin.com>
To:     Chen-Yu Tsai <wens@kernel.org>
Cc:     Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Chen-Yu Tsai <wens@csie.org>,
        linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 00/25] clk: sunxi-ng: clk parent rewrite part 1
Message-ID: <20190520090327.iejd3q7c3iwomzlz@flea>
References: <20190520080421.12575-1-wens@kernel.org>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="2ypype76y25ofynl"
Content-Disposition: inline
In-Reply-To: <20190520080421.12575-1-wens@kernel.org>
User-Agent: NeoMutt/20180716
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk


--2ypype76y25ofynl
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline

On Mon, May 20, 2019 at 04:03:56PM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@csie.org>
>
> Hi everyone,
>
> This is series is the first part of a large series (I haven't done the
> rest) of patches to rewrite the clk parent relationship handling within
> the sunxi-ng clk driver. This is based on Stephen's recent work allowing
> clk drivers to specify clk parents using struct clk_hw * or parsing DT
> phandles in the clk node.
>
> This series can be split into a few major parts:
>
> 1) The first patch is a small fix for clk debugfs representation. This
>    was done before commit 1a079560b145 ("clk: Cache core in
>    clk_fetch_parent_index() without names") was posted, so it might or
>    might not be needed. Found this when checking my work using
>    clk_possible_parents.
>
> 2) A bunch of CLK_HW_INIT_* helper macros are added. These cover the
>    situations I encountered, or assume I will encounter, such as single
>    internal (struct clk_hw *) parent, single DT (struct clk_parent_data
>    .fw_name), multiple internal parents, and multiple mixed (internal +
>    DT) parents. A special variant for just an internal single parent is
>    added, CLK_HW_INIT_HWS, which lets the driver share the singular
>    list, instead of having the compiler create a compound literal every
>    time. It might even make sense to only keep this variant.
>
> 3) A bunch of CLK_FIXED_FACTOR_* helper macros are added. The rationale
>    is the same as the single parent CLK_HW_INIT_* helpers.
>
> 4) Bulk conversion of CLK_FIXED_FACTOR to use local parent references,
>    either struct clk_hw * or DT .fw_name types, whichever the hardware
>    requires.
>
> 5) The beginning of SUNXI_CCU_GATE conversion to local parent
>    references. This part is not done. They are included as justification
>    and examples for the shared list of clk parents case.

That series is pretty neat. As far as sunxi is concerned, you can add my
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

> I realize this is going to be many patches every time I convert a clock
> type. Going forward would the people involved prefer I send out
> individual patches like this series, or squash them all together?

For bisection, I guess it would be good to keep the approach you've
had in this series. If this is really too much, I guess we can always
change oru mind later on.

Thanks!
Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

--2ypype76y25ofynl
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXOJtXgAKCRDj7w1vZxhR
xQfkAQDQX2OO7NWM6Uc/mv7S2HQgLu755CMRobYRqL6EDMn5twD/WlNMYOlQibvH
Kk0T6Z3CVuTDEoh9v+fpo5OUWhc1qw4=
=G/SF
-----END PGP SIGNATURE-----

--2ypype76y25ofynl--