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[209.132.180.67]) by mx.google.com with ESMTP id q11si20181298pgf.519.2019.05.21.01.11.38; Tue, 21 May 2019 01:11:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727348AbfEUIKL (ORCPT + 99 others); Tue, 21 May 2019 04:10:11 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:35789 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726138AbfEUIKL (ORCPT ); Tue, 21 May 2019 04:10:11 -0400 X-Originating-IP: 90.88.22.185 Received: from localhost (aaubervilliers-681-1-80-185.w90-88.abo.wanadoo.fr [90.88.22.185]) (Authenticated sender: maxime.ripard@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 4598620025; Tue, 21 May 2019 08:10:02 +0000 (UTC) Date: Tue, 21 May 2019 10:10:01 +0200 From: Maxime Ripard To: Michael Nazzareno Trimarchi Cc: Jagan Teki , Chen-Yu Tsai , Rob Herring , Mark Rutland , devicetree , linux-arm-kernel , LKML , linux-amarula , linux-sunxi Subject: Re: [PATCH] arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable CAN Message-ID: <20190521081001.zjq3gnlvyuyexz6m@flea> References: <20190418141658.10868-1-jagan@amarulasolutions.com> <20190418145641.q23tupopz2czjzc5@flea> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="xwglcbrmgqk6xsau" Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --xwglcbrmgqk6xsau Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, May 21, 2019 at 08:47:02AM +0200, Michael Nazzareno Trimarchi wrote: > > > + }; > > > + > > > }; > > > > > > &ehci0 { > > > @@ -77,6 +95,31 @@ > > > status = "okay"; > > > }; > > > > > > +&pio { > > > + can_pins: can-pins { > > > + pins = "PD6", /* RX_BUF1_CAN0 */ > > > + "PD7"; /* RX_BUF0_CAN0 */ > > > + function = "gpio_in"; > > > + }; > > > +}; > > > > That isn't needed. What are they used for, you're not tying them to > > anything? > > Mux of their function is correct. They are connected in the schematics > but not used right now. Then describe the whole thing or don't? And that's kind of missing my point. If that pin group isn't related to any device, the pin muxing will not be changed. So that group, in itself, has strictly no effect. Moreover, you don't need a pin group in the first place to mux pins in GPIOs, the GPIO API will make sure that is the case when you request it. > I can garantee that kernel wlll always configurred in the right way > and if I want I can export in userspace > for debug purpose Yes, because the API does it, not your change Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --xwglcbrmgqk6xsau Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXOOyWQAKCRDj7w1vZxhR xVrXAP461PPKE8+N+fcEtV7h6ivucRpYH0qSu/7rhCb1pnto4gEAkjCJYIuq90Qb VJVC85qKFQVFJBnSNhfkOi8Eoh8IaAM= =KuKJ -----END PGP SIGNATURE----- --xwglcbrmgqk6xsau--