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[73.95.159.87]) by smtp.gmail.com with ESMTPSA id b18sm1001759itd.40.2019.05.21.01.11.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 21 May 2019 01:11:27 -0700 (PDT) Date: Tue, 21 May 2019 01:11:27 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Wesley Terpstra , Christoph Hellwig cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley Subject: Re: [PATCH] riscv: include generic support for MSI irqdomains In-Reply-To: <20190521063551.GA5959@infradead.org> Message-ID: References: <20190520182528.10627-1-paul.walmsley@sifive.com> <20190521063551.GA5959@infradead.org> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 20 May 2019, Christoph Hellwig wrote: > On Mon, May 20, 2019 at 11:25:28AM -0700, Paul Walmsley wrote: > > Some RISC-V systems include PCIe host controllers that support PCIe > > message-signaled interrupts. For this to work on Linux, we need to > > enable PCI_MSI_IRQ_DOMAIN and define struct msi_alloc_info. Support > > for the latter is enabled by including the architecture-generic msi.h > > include. > > > > Based on a patch from Wesley Terpstra : > > > > https://github.com/riscv/riscv-linux/commit/7d55f38fb79f459d2e88bcee7e147796400cafa8 > > > > Signed-off-by: Paul Walmsley > > Signed-off-by: Paul Walmsley > > Cc: Wesley Terpstra > > Well, this is very much Wes' patch as-is. It should probably be > attributed to him and you should ask for his signoff. Yeah. There aren't many other ways to do it. Wes, care to reply with your Signed-off-by: ? - Paul