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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=au7OC2A7Guh99fx1B8y7qn2lZwtaJ2nyyc12g0STJmw=; b=Rjp8ynz2IT9lIFKD6w8xHeACgXGCtIotZV1RxNSZ1+G8xRy4owhFJjzwJwWYsUdRwRPAXPwXGrB5TBi4K1xcZn3vNMCNgX+B1Da1MKiAIBCGoIt8pwEHzIGo4SugVeTvDkWbAsciSRdlHKVEnUuUz8ONAvx09ys5zvwC75TQkpU= Received: from VE1PR08MB5006.eurprd08.prod.outlook.com (10.255.159.31) by VE1PR08MB4687.eurprd08.prod.outlook.com (10.255.115.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1900.16; Tue, 21 May 2019 08:17:23 +0000 Received: from VE1PR08MB5006.eurprd08.prod.outlook.com ([fe80::206b:5cf6:97e:1358]) by VE1PR08MB5006.eurprd08.prod.outlook.com ([fe80::206b:5cf6:97e:1358%7]) with mapi id 15.20.1900.020; Tue, 21 May 2019 08:17:23 +0000 From: "james qian wang (Arm Technology China)" To: Ayan Halder CC: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "Jonathan Chai (Arm Technology China)" , "Julien Yin (Arm Technology China)" , "thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , "Tiannan Zhu (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , nd , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Davis , "Oscar Zhang (Arm Technology China)" , "Channing Chen (Arm Technology China)" Subject: Re: [PATCH v3] drm/komeda: Add writeback support Thread-Topic: [PATCH v3] drm/komeda: Add writeback support Thread-Index: AQHVC789IjGa0UPk40CMGlet+6K8QA== Date: Tue, 21 May 2019 08:17:23 +0000 Message-ID: <20190521081716.GA20057@james-ThinkStation-P300> References: <20190516081300.25530-1-james.qian.wang@arm.com> <20190516123344.GA1372@arm.com> In-Reply-To: <20190516123344.GA1372@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mutt/1.9.4 (2018-02-28) x-originating-ip: [113.29.88.7] x-clientproxiedby: HK0PR03CA0097.apcprd03.prod.outlook.com (2603:1096:203:b0::13) To VE1PR08MB5006.eurprd08.prod.outlook.com (2603:10a6:803:113::31) authentication-results: spf=none (sender IP is ) smtp.mailfrom=james.qian.wang@arm.com; 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received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: rCfW+Mxes/59BzGt28YRk+4ZT+OX+W4q7xSMQc2D5wdz3c4eRmCD1Cdna7qCleLnM6HRfpqs+697/1LAiFTTcsYmboy60OFz2kw+zd+aZxX4SbzI/g7kBQMHZTxtLNXSM5NJVbRxho6cPKO7OTv2I+02g9iGAhYSdDj1tiQG3TXD0NXzETMhJPXs0vEAIYdzpyiF37oEWaSZ7wgjIKQHz4Q4aGIze8cF7wyGlxSQ+nc80yf0ZnJGBQ1+U3eS7ZZBZ9KOZ+HIz0VEDMkG/oS85spGcB5ZEZ0F+qUs2EB9B2v1FqBzl9FKzSTWB9H+Scm0Sa6FAq32pGb7T9fAkaiYCG3oaH87UmTwV/qttpkd6R4I9DYT1/N8NxEMzZu5uwiG3JmRboGR/GoYxU6DWAK0EHBcPTQZ2zD3AXxA3krBDrQ= Content-Type: text/plain; charset="us-ascii" Content-ID: <4E6A497499A3724D86BDA6095F101C9B@eurprd08.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: b55c8e51-a894-4ecb-8beb-08d6ddc4c039 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 May 2019 08:17:23.3406 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4687 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ayan: Sorry for late. On Thu, May 16, 2019 at 08:33:45PM +0800, Ayan Halder wrote: > On Thu, May 16, 2019 at 09:13:27AM +0100, james qian wang (Arm Technology= China) wrote: > > Komeda driver uses a individual component to describe the HW's writebac= k > > caps, but drivers doesn't define a new structure and still uses the > > existing "struct komeda_layer" to describe this new component. > > The detailed changes as follow: > >=20 > > 1. Initialize wb_layer according to HW and report it to CORE. > > 2. CORE exposes wb_layer as a resource to KMS by private_obj. > > 3. Report writeback supporting by add a wb_connector to KMS, and then > > wb_connector will take act as a component resources user, > > so the func komeda_wb_encoder_atomic_check claims komeda resources > > (scaler and wb_layer) accroding to its state configuration to the > > wb_connector. and the wb_state configuration will be validated on th= e > > specific component resources to see if the caps of component can > > meet the requirement of wb_connector. if not check failed. > > 4. Update irq_handler to notify the completion of writeback. > >=20 > > NOTE: > > This change doesn't add scaling writeback support, that support will > > be added in the future after the scaler support. > >=20 > > v2: Rebase > > v3: Rebase and constify the d71_wb_layer_funcs > >=20 > > Depends on: > > - https://patchwork.freedesktop.org/series/59915/ > >=20 > > Signed-off-by: James Qian Wang (Arm Technology China) > > --- > > drivers/gpu/drm/arm/display/komeda/Makefile | 1 + > > .../arm/display/komeda/d71/d71_component.c | 90 ++++++++- > > .../gpu/drm/arm/display/komeda/komeda_crtc.c | 15 ++ > > .../arm/display/komeda/komeda_framebuffer.c | 19 ++ > > .../gpu/drm/arm/display/komeda/komeda_kms.c | 4 + > > .../gpu/drm/arm/display/komeda/komeda_kms.h | 27 +++ > > .../drm/arm/display/komeda/komeda_pipeline.h | 7 + > > .../display/komeda/komeda_pipeline_state.c | 51 ++++- > > .../arm/display/komeda/komeda_private_obj.c | 6 + > > .../arm/display/komeda/komeda_wb_connector.c | 181 ++++++++++++++++++ > > 10 files changed, 398 insertions(+), 3 deletions(-) > > create mode 100644 drivers/gpu/drm/arm/display/komeda/komeda_wb_connec= tor.c > >=20 > > diff --git a/drivers/gpu/drm/arm/display/komeda/Makefile b/drivers/gpu/= drm/arm/display/komeda/Makefile > > index 62bd1bff66a3..d7e29fc688c3 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/Makefile > > +++ b/drivers/gpu/drm/arm/display/komeda/Makefile > > @@ -14,6 +14,7 @@ komeda-y :=3D \ > > komeda_kms.o \ > > komeda_crtc.o \ > > komeda_plane.o \ > > + komeda_wb_connector.o \ > > komeda_private_obj.o > > =20 > > komeda-y +=3D \ > > diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/d= rivers/gpu/drm/arm/display/komeda/d71/d71_component.c > > index 6bab816ed8e7..67e698d0e6aa 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c > > +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c > > @@ -288,10 +288,98 @@ static int d71_layer_init(struct d71_dev *d71, > > return 0; > > } > > =20 > > +static void d71_wb_layer_update(struct komeda_component *c, > > + struct komeda_component_state *state) > > +{ > > + struct komeda_layer_state *st =3D to_layer_st(state); > > + struct drm_connector_state *conn_st =3D state->wb_conn->state; > > + struct drm_framebuffer *fb =3D conn_st->writeback_job->fb; > > + struct komeda_fb *kfb =3D to_kfb(fb); > > + u32 __iomem *reg =3D c->reg; > > + u32 ctrl =3D L_EN | LW_OFM, mask =3D L_EN | LW_OFM | LW_TBU_EN; > > + int i; > > + > > + for (i =3D 0; i < fb->format->num_planes; i++) { > > + malidp_write32(reg + i * LAYER_PER_PLANE_REGS, BLK_P0_PTR_LOW, > > + lower_32_bits(st->addr[i])); > > + malidp_write32(reg + i * LAYER_PER_PLANE_REGS, BLK_P0_PTR_HIGH, > > + upper_32_bits(st->addr[i])); > > + > > + malidp_write32(reg + i * LAYER_PER_PLANE_REGS, BLK_P0_STRIDE, > > + fb->pitches[i] & 0xFFFF); > > + } > > + > > + malidp_write32(reg, LAYER_FMT, kfb->format_caps->hw_id); > > + malidp_write32(reg, BLK_IN_SIZE, HV_SIZE(st->hsize, st->vsize)); > > + malidp_write32(reg, BLK_INPUT_ID0, to_d71_input_id(&state->inputs[0])= ); > > + malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl); > > +} > > + > > +static void d71_wb_layer_dump(struct komeda_component *c, struct seq_f= ile *sf) > > +{ > > + u32 v[12], i; > > + > > + dump_block_header(sf, c->reg); > > + > > + get_values_from_reg(c->reg, 0x80, 1, v); > > + seq_printf(sf, "LW_INPUT_ID0:\t\t0x%X\n", v[0]); > > + > > + get_values_from_reg(c->reg, 0xD0, 3, v); > > + seq_printf(sf, "LW_CONTROL:\t\t0x%X\n", v[0]); > > + seq_printf(sf, "LW_PROG_LINE:\t\t0x%X\n", v[1]); > > + seq_printf(sf, "LW_FORMAT:\t\t0x%X\n", v[2]); > > + > > + get_values_from_reg(c->reg, 0xE0, 1, v); > > + seq_printf(sf, "LW_IN_SIZE:\t\t0x%X\n", v[0]); > > + > > + for (i =3D 0; i < 2; i++) { > > + get_values_from_reg(c->reg, 0x100 + i * 0x10, 3, v); > > + seq_printf(sf, "LW_P%u_PTR_LOW:\t\t0x%X\n", i, v[0]); > > + seq_printf(sf, "LW_P%u_PTR_HIGH:\t\t0x%X\n", i, v[1]); > > + seq_printf(sf, "LW_P%u_STRIDE:\t\t0x%X\n", i, v[2]); > > + } > > + > > + get_values_from_reg(c->reg, 0x130, 12, v); > > + for (i =3D 0; i < 12; i++) > > + seq_printf(sf, "LW_RGB_YUV_COEFF%u:\t0x%X\n", i, v[i]); > > +} > > + > > +static void d71_wb_layer_disable(struct komeda_component *c) > > +{ > > + malidp_write32(c->reg, BLK_INPUT_ID0, 0); > > + malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0); > > +} > > + > > +static const struct komeda_component_funcs d71_wb_layer_funcs =3D { > > + .update =3D d71_wb_layer_update, > > + .disable =3D d71_wb_layer_disable, > > + .dump_register =3D d71_wb_layer_dump, > > +}; > > + > > static int d71_wb_layer_init(struct d71_dev *d71, > > struct block_header *blk, u32 __iomem *reg) > > { > > - DRM_DEBUG("Detect D71_Wb_Layer.\n"); > > + struct komeda_component *c; > > + struct komeda_layer *wb_layer; > > + u32 pipe_id, layer_id; > > + > > + get_resources_id(blk->block_info, &pipe_id, &layer_id); > > + > > + c =3D komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*wb_lay= er), > > + layer_id, BLOCK_INFO_INPUT_ID(blk->block_info), > > + &d71_wb_layer_funcs, > > + 1, get_valid_inputs(blk), 0, reg, > > + "LPU%d_LAYER_WR", pipe_id); > > + if (!c) { > I think we should use 'IS_ERR(c)' as komeda_component_add() returns a val= id > error code. Yes, you're right it should be IS_ERR(c). thank you for pointing this out. and seems I also need the check all the pending reviews. :) >=20 > > + DRM_ERROR("Failed to add wb_layer component\n"); > > + return -EINVAL; > > + } > > + > > + wb_layer =3D to_layer(c); > > + wb_layer->layer_type =3D KOMEDA_FMT_WB_LAYER; > > + > > + set_range(&wb_layer->hsize_in, D71_MIN_LINE_SIZE, d71->max_line_size)= ; > > + set_range(&wb_layer->vsize_in, D71_MIN_VERTICAL_SIZE, d71->max_vsize)= ; > > =20 > > return 0; > > } > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers= /gpu/drm/arm/display/komeda/komeda_crtc.c > > index 284ce079d8c4..6712603b8c7a 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c > > @@ -165,6 +165,15 @@ void komeda_crtc_handle_event(struct komeda_crtc = *kcrtc, > > if (events & KOMEDA_EVENT_VSYNC) > > drm_crtc_handle_vblank(crtc); > > =20 > > + if (events & KOMEDA_EVENT_EOW) { > > + struct komeda_wb_connector *wb_conn =3D kcrtc->wb_conn; > > + > > + if (wb_conn) > > + drm_writeback_signal_completion(&wb_conn->base, 0); > > + else > > + DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n", > > + drm_crtc_index(&kcrtc->base)); > > + } > > /* will handle it together with the write back support */ > > if (events & KOMEDA_EVENT_EOW) > > DRM_DEBUG("EOW.\n"); > > @@ -201,6 +210,8 @@ komeda_crtc_do_flush(struct drm_crtc *crtc, > > struct komeda_crtc_state *kcrtc_st =3D to_kcrtc_st(crtc->state); > > struct komeda_dev *mdev =3D kcrtc->base.dev->dev_private; > > struct komeda_pipeline *master =3D kcrtc->master; > > + struct komeda_wb_connector *wb_conn =3D kcrtc->wb_conn; > > + struct drm_connector_state *conn_st; > > =20 > > DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n= ", > > drm_crtc_index(crtc), > > @@ -210,6 +221,10 @@ komeda_crtc_do_flush(struct drm_crtc *crtc, > > if (has_bit(master->id, kcrtc_st->affected_pipes)) > > komeda_pipeline_update(master, old->state); > > =20 > > + conn_st =3D wb_conn ? wb_conn->base.base.state : NULL; > > + if (conn_st && conn_st->writeback_job) > > + drm_writeback_queue_job(&wb_conn->base, conn_st); > > + > > /* step 2: notify the HW to kickoff the update */ > > mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes); > > } > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/= drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c > > index 9cc9935024f7..4d8160cf09c3 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c > > @@ -165,3 +165,22 @@ komeda_fb_get_pixel_addr(struct komeda_fb *kfb, in= t x, int y, int plane) > > =20 > > return obj->paddr + offset; > > } > > + > > +/* if the fb can be supported by a specific layer */ > > +bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_typ= e) > > +{ > > + struct drm_framebuffer *fb =3D &kfb->base; > > + struct komeda_dev *mdev =3D fb->dev->dev_private; > > + const struct komeda_format_caps *caps; > > + u32 fourcc =3D fb->format->format; > > + u64 modifier =3D fb->modifier; > > + > > + caps =3D komeda_get_format_caps(&mdev->fmt_tbl, fourcc, modifier); > > + if (!caps) > > + return false; > > + > > + if (!(caps->supported_layer_types & layer_type)) > > + return false; > > + > > + return true; > > +} > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c b/drivers/= gpu/drm/arm/display/komeda/komeda_kms.c > > index 86f6542afb40..3e58901fb776 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > > @@ -188,6 +188,10 @@ struct komeda_kms_dev *komeda_kms_attach(struct ko= meda_dev *mdev) > > if (err) > > goto cleanup_mode_config; > > =20 > > + err =3D komeda_kms_add_wb_connectors(kms, mdev); > > + if (err) > > + goto cleanup_mode_config; > > + > > err =3D component_bind_all(mdev->dev, kms); > > if (err) > > goto cleanup_mode_config; > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/= gpu/drm/arm/display/komeda/komeda_kms.h > > index ac3d9209b4d9..f16e9e577593 100644 > > --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h > > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h > > @@ -12,6 +12,7 @@ > > #include > > #include > > #include > > +#include > > #include