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References: <20190520092856.26307-1-yamada.masahiro@socionext.com>
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From:   Jun Li <lijun.kernel@gmail.com>
Date:   Tue, 21 May 2019 17:13:48 +0800
Message-ID: <CAKgpwJXEHjww0aV4x033qugw75NUtkMg3vvgtCDNgWaWbps29A@mail.gmail.com>
Subject: Re: [PATCH] usb: dwc3: move core validatation after clock enable and
 reset deassert
To:     Masahiro Yamada <yamada.masahiro@socionext.com>
Cc:     Felipe Balbi <felipe.balbi@linux.intel.com>,
        linux-usb@vger.kernel.org,
        Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Felipe Balbi <balbi@kernel.org>, linux-kernel@vger.kernel.org
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There is already one identical patch for this:
https://patchwork.kernel.org/patch/10934937/
either one is okay.

Li Jun

Masahiro Yamada <yamada.masahiro@socionext.com> =E4=BA=8E2019=E5=B9=B45=E6=
=9C=8820=E6=97=A5=E5=91=A8=E4=B8=80 =E4=B8=8B=E5=8D=886:45=E5=86=99=E9=81=
=93=EF=BC=9A
>
> Since commit b873e2d0ea1e ("usb: dwc3: Do core validation early on
> probe"), the DWC3 USB3 does not work for Socionext UniPhier platform.
>
> It moved dwc3_core_is_valid() really early, where no clock is enabled,
> no reset is deasserted. Any attempt to register access causes the
> system stall on my platform.
>
> Move it after clk_bulk_enable(), and still before dwc3_get_dr_mode().
>
> Fixes: b873e2d0ea1e ("usb: dwc3: Do core validation early on probe")
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
>  drivers/usb/dwc3/core.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 4aff1d8dbc4f..93b96e6abddb 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -1423,11 +1423,6 @@ static int dwc3_probe(struct platform_device *pdev=
)
>         dwc->regs       =3D regs;
>         dwc->regs_size  =3D resource_size(&dwc_res);
>
> -       if (!dwc3_core_is_valid(dwc)) {
> -               dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core=
\n");
> -               return -ENODEV;
> -       }
> -
>         dwc3_get_properties(dwc);
>
>         dwc->reset =3D devm_reset_control_get_optional_shared(dev, NULL);
> @@ -1460,6 +1455,12 @@ static int dwc3_probe(struct platform_device *pdev=
)
>         if (ret)
>                 goto unprepare_clks;
>
> +       if (!dwc3_core_is_valid(dwc)) {
> +               dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core=
\n");
> +               ret =3D -ENODEV;
> +               goto disable_clks;
> +       }
> +
>         platform_set_drvdata(pdev, dwc);
>         dwc3_cache_hwparams(dwc);
>
> @@ -1524,7 +1525,7 @@ static int dwc3_probe(struct platform_device *pdev)
>  err1:
>         pm_runtime_put_sync(&pdev->dev);
>         pm_runtime_disable(&pdev->dev);
> -
> +disable_clks:
>         clk_bulk_disable(dwc->num_clks, dwc->clks);
>  unprepare_clks:
>         clk_bulk_unprepare(dwc->num_clks, dwc->clks);
> --
> 2.17.1
>