Received: by 2002:a25:86ce:0:0:0:0:0 with SMTP id y14csp1141308ybm; Tue, 21 May 2019 09:13:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqzITQRuehVfXOuqqzdybn5MyJ22A+ZgueWP2+rB+3RaXNz3tbxBWp80YATb2pECffr1ZySz X-Received: by 2002:a63:191b:: with SMTP id z27mr83411847pgl.327.1558455224100; Tue, 21 May 2019 09:13:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558455224; cv=none; d=google.com; s=arc-20160816; b=TVLdqPCXkSLmQ0vOODy0NVfFONKff/qAgFaA5Sbw124P2SRMTu4Dn5Hg5JfA31Yhk5 nayNL0au3rgWndJBFdpMC3nlivJAsJTJHYNLPW9MlynkAMzN5UPYOKVAG/9zJ/+q+bQI XVy60vIXQQRbY8TY3QSqNGb7jJAter7MZGNXvEOCjRAZV+bKpw/GZg46QER49UcwZLQR 3wpYHw1sGo+RWn3lSHB+tvc84VxaaDRf88KWeNKvvHelAjkQ8homfKe6OFFQxPFtmu4i K3KUg/kFV4+nWSdCXAKQUU8ycXI9WUVZH3nUQzWWUXHDqUcR15i2fhHW6FBg01uhx1KD OxyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=qZpAwNhdIFVkFrwU4I/Bwa0YHHvmiApZTgEIEoRU1WFnJfGCyA3CgZyBKhff3hDAMo An9q03xsFj89i/wWEGbXyjbiMqkvYIki3vnUmymQ5XQIGBNGshCV2L2LErtWMhPBa4Wg Oum/O52Z6wTj6RmBDCuM28uEUnPWZp13HSvYb0kOalQcBa07SsTdFbG75i4sXqYGl/QW IuqLZjRUwF5WY1HKadBHoUNe7VTlNXiC7+YjopF6xbqippfpOldAcY83iDZMCKl7IWYD WuA0ppV9r6D6U1idFrKRiEn6mG7jXSCKkNgTjVt7JJ9v3JG8DwJWU2TGqJYi7W+phAaV yf/w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=DfdW1XdD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j91si21311153pld.267.2019.05.21.09.13.28; Tue, 21 May 2019 09:13:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=DfdW1XdD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729081AbfEUQLc (ORCPT + 99 others); Tue, 21 May 2019 12:11:32 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:47040 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728933AbfEUQLN (ORCPT ); Tue, 21 May 2019 12:11:13 -0400 Received: by mail-wr1-f65.google.com with SMTP id r7so19246053wrr.13; Tue, 21 May 2019 09:11:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=DfdW1XdDhItosbvciVXVrDVugIjIifv3cMUMU94Jp8X2FK0ZQxxAZxbv2Qn6Fn5cQw 49oQd6X322hDf8QS0nhTjEWv5J8P0acGtDtNKgQZuxIKRTV9u11Hl+bRwOWopyqopQ+Y Lonri78CM6AFUOHPJRHIFr/dOLafFuQxH2L5XPIYZqgW3eN7bPO9qFdCmfynZBpAgiLx Xqs7gEgHeQrAWN7IkS+ExBahYnEL7Dy2Cq0ITBOFdyerMgXruyGZs3ON566JrInM7H17 YfImRCPSTYENl1tnCSf11UodIQ3LinQlSKeR8WR7i6XeC618r8r7hUfdpgHQDMKqPUrG VkoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2w/o0YvWj4GW2dKc8xosf8L/TwKxnX3w/M6Sh7NSyHk=; b=sklUUIeJcQJ5RxV7bGgpj5erbJ+RKZBlqgXjIIf0rZcxuG2arC+hTnCjbQbuMvzute bQH4WJvgYOkKZSKlo4+KcECuxDw1eV8lNfOyfhPuTqxBjbs/OZhOw3VJv8Va9A2pQoPW rJ16E4NKnutHITPMCFXvQkRWU+oOcUHSucTfkEQtTpNKqATfQBAPMgK9YJIvLNNgPtrd 0njwh4wA9bQdAnvjgmhLx/DmyUx3ipTuTsJGHs88mdMHWzjxX3ccj2UFmcdQvvkwkosk hBJkZNLQ9oS+Qg91BEmQzwdok8I8Ccw4J4E8GfDJH/pp7VpRw6Hrz5NwXOy51cpewTKl enew== X-Gm-Message-State: APjAAAUe54fi2+W/Ctux91bXgOrDtb9O2oYIivA5VeI+6DFFq2fsgi8P P+3I1vjJ07NY2jQhiy8Nt60= X-Received: by 2002:adf:f78d:: with SMTP id q13mr1959297wrp.220.1558455071876; Tue, 21 May 2019 09:11:11 -0700 (PDT) Received: from localhost.localdomain (18.189-60-37.rdns.acropolistelecom.net. [37.60.189.18]) by smtp.gmail.com with ESMTPSA id n63sm3891094wmn.38.2019.05.21.09.11.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 May 2019 09:11:11 -0700 (PDT) From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= To: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Tomeu Vizoso , Will Deacon , Robin Murphy , Joerg Roedel , Neil Armstrong , Steven Price Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, Icenowy Zheng , =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= Subject: [PATCH v6 3/6] dt-bindings: gpu: add bus clock for Mali Midgard GPUs Date: Tue, 21 May 2019 18:10:59 +0200 Message-Id: <20190521161102.29620-4-peron.clem@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190521161102.29620-1-peron.clem@gmail.com> References: <20190521161102.29620-1-peron.clem@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Icenowy Zheng Some SoCs adds a bus clock gate to the Mali Midgard GPU. Add the binding for the bus clock. Signed-off-by: Icenowy Zheng Signed-off-by: Clément Péron Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt index 1b1a74129141..2e8bbce35695 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt @@ -31,6 +31,12 @@ Optional properties: - clocks : Phandle to clock for the Mali Midgard device. +- clock-names : Specify the names of the clocks specified in clocks + when multiple clocks are present. + * core: clock driving the GPU itself (When only one clock is present, + assume it's this clock.) + * bus: bus clock for the GPU + - mali-supply : Phandle to regulator for the Mali device. Refer to Documentation/devicetree/bindings/regulator/regulator.txt for details. -- 2.17.1