Received: by 2002:a25:86ce:0:0:0:0:0 with SMTP id y14csp1653977ybm; Thu, 23 May 2019 04:49:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqzDdmqPC8wakHJkZS9oFbwuJuHYxh1DnZ+ew78KDk6zIHl69o8bF+n1NrQHk0Ji7UFny5ct X-Received: by 2002:a63:4710:: with SMTP id u16mr86591108pga.447.1558612184906; Thu, 23 May 2019 04:49:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558612184; cv=none; d=google.com; s=arc-20160816; b=F0FASESuxuQLTgvBtYgCYE5FuDctMcjcNpTyQ3bKC2L6x6lRupv+tjG7DnTRXNmVL+ HElbk0xKmNo6ca34E16r+Tb/8juAYanLcBEH1kuYEC6mKxJjr4Ro24/mMjijT4QLi6n+ PDdioNaSeY5gjEw4nLR3ESxHpF8hzJE9gRuC/8vWdJMJNrbGNT72gbMh+JMqqTHMrVZC TPALhSLmtNewpoQI5cN4CRDh9LpJA+52qJkee9s/0eEY6isWmWh/ML3F5i8UVwKFlzzH I7I3u0s3+Hn71GCIwF4GAdLC2yCZ805ashBpZPc4ZTf3H32trSAvXGpEw65npvttAcVe u+Bg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=LEifsqwnL2BjXCVuqDW5HukFRG14FiPFkC5knaitSp8=; b=LQjIS3lKioHoKrPAQOVpHVEgNQyXMNiwfdt72L218pnIX69YQHF1ee24KlyGmznX1l mbp4L9uTSNWb4sTeOcEzj9Vsl2pl1zlmkLaOLkQ6h72OI/Qp46i6y0/o3FyB+W5uN2cQ Ngqv2hdqjNr2JHDJ4d8H7zA1+WpkQz00TRjn9HgSYhKE8/mTki5Vu7zhM/ufMYInpU4Q cEE98rYqxGSHMIQA9GFT4n3dD1xAKSiKAB33zMpLXUGxm1Dfr+ZGiW5uCieFDUulOjuH bRDQc6JgyvnaE7GJpF2ug5e8a1sL/k+B3wYEiIYcevStD7aZHdrcRwKXuHrOSDot07HS A51g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=Lvt9jRIK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b59si5404045plc.315.2019.05.23.04.49.29; Thu, 23 May 2019 04:49:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=Lvt9jRIK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730606AbfEWLqi (ORCPT + 99 others); Thu, 23 May 2019 07:46:38 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:43422 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730485AbfEWLqh (ORCPT ); Thu, 23 May 2019 07:46:37 -0400 Received: by mail-pg1-f195.google.com with SMTP id f25so3008548pgv.10 for ; Thu, 23 May 2019 04:46:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LEifsqwnL2BjXCVuqDW5HukFRG14FiPFkC5knaitSp8=; b=Lvt9jRIK0RxPlPR9Ydlr2C/j77GrQptj8vSfAUw8rYMnhtJa2cDk84ixTSGctwKty2 7nz5mlHIUD9kRcsLQScD+TJU1Dcp1leEw+1SGih4l+elbSJL3p4bHk7YbrJqWO7YvZZW HZOecpMOYn/eWKc2zdp17ipfC+L5hZeG8NJUlCkPE7oRmJSNv3ltNYXnNqhkzZO4Uejd Hw1tQSAunCp0MojMPQ5QkDfziBEmOKiyaeeAWMkJx1z9iQ5iF1O73qfg6T8QPavedq++ LOuw5PPoXzLkI8T52+98iKNiLjVcuxGrGfevv4SZm6YF/sp50q0k+ForMnDkWkLQcYu/ xptA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LEifsqwnL2BjXCVuqDW5HukFRG14FiPFkC5knaitSp8=; b=oAs/iA6BQln9vmML4O1YdRjXUp9we0QT88MwF9kr93gLds+vtQJPJ4KVbcrBtRfs3U M0OwedB+pPl2TD+xT1EXhbZ6rsiXzxPY9rbOxoRzs25vH7qVEq4b4XMKZP1ISIVqiz5b 7zIaMOQKaZYy3z9uRtyfCgauwZKw8swlnbIbG7Z0tisfR+ovbJldKNM0gg9gbD3Huc7h CfcQQ8bPlw6qwaW94FH7XHa7e5esQGQK0jAYJpX+HjBK5aRJDC6kd+9d0y3vM6m6rfjE 9TPJWsdCyaG0hL/ECeOnRd+BOH5LN02UI6kLiM1Xwcp16O7VyTeP5824ULVxGB/3QRws BE2g== X-Gm-Message-State: APjAAAWCkul1XTEb9A0+KD+eT5g2wJCOzeBVLJFYQ+G+YJPNtfrJUctt wCi4/whkcBOeLozEjIYg1VySYw== X-Received: by 2002:a63:2ac9:: with SMTP id q192mr26316526pgq.144.1558611997020; Thu, 23 May 2019 04:46:37 -0700 (PDT) Received: from buildserver-90.open-silicon.com ([114.143.65.226]) by smtp.googlemail.com with ESMTPSA id l43sm565045pjb.7.2019.05.23.04.46.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 23 May 2019 04:46:36 -0700 (PDT) From: Yash Shah To: davem@davemloft.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, mark.rutland@arm.com, nicolas.ferre@microchip.com, palmer@sifive.com, aou@eecs.berkeley.edu, ynezz@true.cz, paul.walmsley@sifive.com, sachin.ghadi@sifive.com, Yash Shah Subject: [PATCH 2/2] net: macb: Add support for SiFive FU540-C000 Date: Thu, 23 May 2019 17:15:52 +0530 Message-Id: <1558611952-13295-3-git-send-email-yash.shah@sifive.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1558611952-13295-1-git-send-email-yash.shah@sifive.com> References: <1558611952-13295-1-git-send-email-yash.shah@sifive.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The management IP block is tightly coupled with the Cadence MACB IP block on the FU540, and manages many of the boundary signals from the MACB IP. This patch only controls the tx_clk input signal to the MACB IP. Future patches may add support for monitoring or controlling other IP boundary signals. Signed-off-by: Yash Shah --- drivers/net/ethernet/cadence/macb_main.c | 118 +++++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index c049410..a9e5227 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include +#include #include #include #include @@ -40,6 +41,15 @@ #include #include "macb.h" +/* This structure is only used for MACB on SiFive FU540 devices */ +struct sifive_fu540_macb_mgmt { + void __iomem *reg; + unsigned long rate; + struct clk_hw hw; +}; + +static struct sifive_fu540_macb_mgmt *mgmt; + #define MACB_RX_BUFFER_SIZE 128 #define RX_BUFFER_MULTIPLE 64 /* bytes */ @@ -3903,6 +3913,113 @@ static int at91ether_init(struct platform_device *pdev) return 0; } +static unsigned long fu540_macb_tx_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return mgmt->rate; +} + +static long fu540_macb_tx_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + if (WARN_ON(rate < 2500000)) + return 2500000; + else if (rate == 2500000) + return 2500000; + else if (WARN_ON(rate < 13750000)) + return 2500000; + else if (WARN_ON(rate < 25000000)) + return 25000000; + else if (rate == 25000000) + return 25000000; + else if (WARN_ON(rate < 75000000)) + return 25000000; + else if (WARN_ON(rate < 125000000)) + return 125000000; + else if (rate == 125000000) + return 125000000; + + WARN_ON(rate > 125000000); + + return 125000000; +} + +static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + rate = fu540_macb_tx_round_rate(hw, rate, &parent_rate); + iowrite32(rate != 125000000, mgmt->reg); + mgmt->rate = rate; + + return 0; +} + +static const struct clk_ops fu540_c000_ops = { + .recalc_rate = fu540_macb_tx_recalc_rate, + .round_rate = fu540_macb_tx_round_rate, + .set_rate = fu540_macb_tx_set_rate, +}; + +static int fu540_c000_clk_init(struct platform_device *pdev, struct clk **pclk, + struct clk **hclk, struct clk **tx_clk, + struct clk **rx_clk, struct clk **tsu_clk) +{ + struct clk_init_data init; + int err = 0; + + err = macb_clk_init(pdev, pclk, hclk, tx_clk, rx_clk, tsu_clk); + if (err) + return err; + + mgmt = devm_kzalloc(&pdev->dev, sizeof(*mgmt), GFP_KERNEL); + if (!mgmt) + return -ENOMEM; + + init.name = "sifive-gemgxl-mgmt"; + init.ops = &fu540_c000_ops; + init.flags = 0; + init.num_parents = 0; + + mgmt->rate = 0; + mgmt->hw.init = &init; + + *tx_clk = clk_register(NULL, &mgmt->hw); + if (IS_ERR(*tx_clk)) + return PTR_ERR(*tx_clk); + + err = clk_prepare_enable(*tx_clk); + if (err) + dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err); + else + dev_info(&pdev->dev, "Registered clk switch '%s'\n", init.name); + + return 0; +} + +static int fu540_c000_init(struct platform_device *pdev) +{ + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) + return -ENODEV; + + mgmt->reg = ioremap(res->start, resource_size(res)); + if (!mgmt->reg) + return -ENOMEM; + + return macb_init(pdev); +} + +static const struct macb_config fu540_c000_config = { + .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP, + .dma_burst_length = 16, + .clk_init = fu540_c000_clk_init, + .init = fu540_c000_init, + .jumbo_max_len = 10240, +}; + static const struct macb_config at91sam9260_config = { .caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, .clk_init = macb_clk_init, @@ -3980,6 +4097,7 @@ static int at91ether_init(struct platform_device *pdev) { .compatible = "cdns,at32ap7000-macb" }, { .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config }, { .compatible = "cdns,macb" }, + { .compatible = "cdns,fu540-macb", .data = &fu540_c000_config }, { .compatible = "cdns,np4-macb", .data = &np4_config }, { .compatible = "cdns,pc302-gem", .data = &pc302gem_config }, { .compatible = "cdns,gem", .data = &pc302gem_config }, -- 1.9.1