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[73.95.159.87]) by smtp.gmail.com with ESMTPSA id 81sm144991ity.38.2019.05.23.11.45.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 23 May 2019 11:45:58 -0700 (PDT) Date: Thu, 23 May 2019 11:45:57 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Atish Patra cc: "linux-kernel@vger.kernel.org" , "mark.rutland@arm.com" , "marek.vasut@gmail.com" , "trini@konsulko.com" , Albert Ou , Anup Patel , Palmer Dabbelt , Zong Li , "catalin.marinas@arm.com" , "will.deacon@arm.com" , "linux-arm-kernel@lists.infradead.org" , "merker@debian.org" , "linux-riscv@lists.infradead.org" Subject: Re: [v2 PATCH] RISC-V: Add a PE/COFF compliant Image header. In-Reply-To: Message-ID: References: <20190501195607.32553-1-atish.patra@wdc.com> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 23 May 2019, Atish Patra wrote: > I have sent out a v3 incorporating most of your suggestions. If ARM > maintainers agree, we can move both the headers to a common place. > > Just FYI: Marek also suggested to add unified support Image.gz for both U-Boot > & RISC-V in U-Boot. I am working on that as well. Great - thanks very much. - Paul