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[209.132.180.67]) by mx.google.com with ESMTP id q6si1286258pgm.101.2019.05.23.14.57.02; Thu, 23 May 2019 14:57:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=KmwMdbus; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388365AbfEWVzy (ORCPT + 99 others); Thu, 23 May 2019 17:55:54 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:40992 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387535AbfEWVzx (ORCPT ); Thu, 23 May 2019 17:55:53 -0400 Received: by mail-pg1-f194.google.com with SMTP id z3so3814459pgp.8 for ; Thu, 23 May 2019 14:55:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id; bh=PurhQGxmOt5OgX95ziE8Uz5xXLYO1YnGDYcH4NyaAV8=; b=KmwMdbusxLFDrj22KnPcx5BKzA583dV/GrebLLNnmUsihWE/QMWs3lTIAouKLUwaop LwgmVJQGVUg2aA+8mx4KJjU7bAF7LtGSr8FiMglX9PLU180cgIynnL0/9TXMA3mSW1M+ /UmO8YBNF1bNKg2+C2Nb60imYJGTKVl+XkH4yQ6Fxqbenfjbl/IPPANZqo6DAu95G16f 3MfFyVw8gm66EwDQbIfgC6fEkCdxWH+Uwd6/EWrWkuO+20grvDS8y/Fis3sO7q93IPon ggEp6LFhzmrCxLh6InSejc0sfAGzRbxlvvT1/+7Z6b9W8sM4GU4RF8/D8lGBbGXY4321 unfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=PurhQGxmOt5OgX95ziE8Uz5xXLYO1YnGDYcH4NyaAV8=; b=DnHYzdZjDctqGxOFh7/arY5WFL3t2eKkxeyKASzbfeqsc3vcv+Y5VjIxIa9dWI1jJ/ YWTqsK8ooD88TJYVCyyG+cQufTWtQJ0qJ3xVmVHzXcdxDgN5Hdnsn1hpG+kfOE7lwvRW P/6CtARW8LmDqv9QQqXaYahSWNbNQ4RZ/oBSazkaKxgB5I66vHlrnuSNBDn4KxAQbk2a JBcgDVd5UBSea4KO1w39it7tibWV6UigQSiZoidrdWkO32czm2Bj8f1c4eNhPZA1dEol 98upgQirId3pYRa8yjBctkZFVFqz5TUAwgOXfmgvfxVDJce2VX4IIhguo3Ei8JoQsDeI akuw== X-Gm-Message-State: APjAAAV7nvlKsJ/rl5nFXdvXZqgFbfQvNEcRHWp6NMPSYkJhDEC5+wCr rSbqHhyW1ca1/yY14dbLJpvQGw== X-Received: by 2002:a63:903:: with SMTP id 3mr86725371pgj.400.1558648553134; Thu, 23 May 2019 14:55:53 -0700 (PDT) Received: from nuc7.sifive.com ([12.206.222.2]) by smtp.gmail.com with ESMTPSA id q75sm422403pfa.175.2019.05.23.14.55.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 23 May 2019 14:55:52 -0700 (PDT) From: Alan Mikhak X-Google-Original-From: Alan Mikhak < alan.mikhak@sifive.com > To: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kishon@ti.com, lorenzo.pieralisi@arm.com, linux-riscv@lists.infradead.org, palmer@sifive.com, paul.walmsley@sifive.com Cc: Alan Mikhak Subject: [PATCH v2] PCI: endpoint: Skip odd BAR when skipping 64bit BAR Date: Thu, 23 May 2019 14:55:40 -0700 Message-Id: <1558648540-14239-1-git-send-email-alan.mikhak@sifive.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Always skip odd bar when skipping 64bit BARs in pci_epf_test_set_bar() and pci_epf_test_alloc_space(). Otherwise, pci_epf_test_set_bar() will call pci_epc_set_bar() on odd loop index when skipping reserved 64bit BAR. Moreover, pci_epf_test_alloc_space() will call pci_epf_alloc_space() on bind for odd loop index when BAR is 64bit but leaks on subsequent unbind by not calling pci_epf_free_space(). Signed-off-by: Alan Mikhak Reviewed-by: Paul Walmsley --- drivers/pci/endpoint/functions/pci-epf-test.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 27806987e93b..96156a537922 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -389,7 +389,7 @@ static void pci_epf_test_unbind(struct pci_epf *epf) static int pci_epf_test_set_bar(struct pci_epf *epf) { - int bar; + int bar, add; int ret; struct pci_epf_bar *epf_bar; struct pci_epc *epc = epf->epc; @@ -400,8 +400,14 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) epc_features = epf_test->epc_features; - for (bar = BAR_0; bar <= BAR_5; bar++) { + for (bar = BAR_0; bar <= BAR_5; bar += add) { epf_bar = &epf->bar[bar]; + /* + * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 + * if the specific implementation required a 64-bit BAR, + * even if we only requested a 32-bit BAR. + */ + add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1; if (!!(epc_features->reserved_bar & (1 << bar))) continue; @@ -413,13 +419,6 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) if (bar == test_reg_bar) return ret; } - /* - * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 - * if the specific implementation required a 64-bit BAR, - * even if we only requested a 32-bit BAR. - */ - if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) - bar++; } return 0; @@ -431,7 +430,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) struct device *dev = &epf->dev; struct pci_epf_bar *epf_bar; void *base; - int bar; + int bar, add; enum pci_barno test_reg_bar = epf_test->test_reg_bar; const struct pci_epc_features *epc_features; @@ -445,8 +444,10 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) } epf_test->reg[test_reg_bar] = base; - for (bar = BAR_0; bar <= BAR_5; bar++) { + for (bar = BAR_0; bar <= BAR_5; bar += add) { epf_bar = &epf->bar[bar]; + add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1; + if (bar == test_reg_bar) continue; @@ -459,8 +460,6 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) dev_err(dev, "Failed to allocate space for BAR%d\n", bar); epf_test->reg[bar] = base; - if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) - bar++; } return 0; -- 2.7.4