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[184.163.105.249]) by smtp.gmail.com with ESMTPSA id w131sm1448000vsw.7.2019.05.24.10.57.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 May 2019 10:57:53 -0700 (PDT) Date: Fri, 24 May 2019 13:57:52 -0400 Message-ID: <20190524135752.GD17138@t480s.localdomain> From: Vivien Didelot To: Rasmus Villemoes Cc: Andrew Lunn , Florian Fainelli , "David S. Miller" , Rasmus Villemoes , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2 2/5] net: dsa: prepare mv88e6xxx_g1_atu_op() for the mv88e6250 In-Reply-To: <20190524085921.11108-3-rasmus.villemoes@prevas.dk> References: <20190501193126.19196-1-rasmus.villemoes@prevas.dk> <20190524085921.11108-1-rasmus.villemoes@prevas.dk> <20190524085921.11108-3-rasmus.villemoes@prevas.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 24 May 2019 09:00:26 +0000, Rasmus Villemoes wrote: > All the currently supported chips have .num_databases either 256 or > 4096, so this patch does not change behaviour for any of those. The > mv88e6250, however, has .num_databases == 64, and it does not put the > upper two bits in ATU control 13:12, but rather in ATU Operation > 9:8. So change the logic to prepare for supporting mv88e6250. > > Reviewed-by: Andrew Lunn > Signed-off-by: Rasmus Villemoes Reviewed-by: Vivien Didelot