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[184.163.105.249]) by smtp.gmail.com with ESMTPSA id w9sm1537289vkh.53.2019.05.24.11.02.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 May 2019 11:02:07 -0700 (PDT) Date: Fri, 24 May 2019 14:02:06 -0400 Message-ID: <20190524140206.GF17138@t480s.localdomain> From: Vivien Didelot To: Rasmus Villemoes Cc: Andrew Lunn , Florian Fainelli , "David S. Miller" , Rasmus Villemoes , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2 3/5] net: dsa: implement vtu_getnext and vtu_loadpurge for mv88e6250 In-Reply-To: <20190524085921.11108-4-rasmus.villemoes@prevas.dk> References: <20190501193126.19196-1-rasmus.villemoes@prevas.dk> <20190524085921.11108-1-rasmus.villemoes@prevas.dk> <20190524085921.11108-4-rasmus.villemoes@prevas.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 24 May 2019 09:00:27 +0000, Rasmus Villemoes wrote: > These are almost identical to the 6185 variants, but have fewer bits > for the FID. > > Bit 10 of the VTU_OP register (offset 0x05) is the VidPolicy bit, > which one should probably preserve in mv88e6xxx_g1_vtu_op(), instead > of always writing a 0. However, on the 6352 family, that bit is > located at bit 12 in the VTU FID register (offset 0x02), and is always > unconditionally cleared by the mv88e6xxx_g1_vtu_fid_write() > function. > > Since nothing in the existing driver seems to know or care about that > bit, it seems reasonable to not add the boilerplate to preserve it for > the 6250 (which would require adding a chip-specific vtu_op function, > or adding chip-quirks to the existing one). > > Reviewed-by: Andrew Lunn > Signed-off-by: Rasmus Villemoes Reviewed-by: Vivien Didelot