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[209.132.180.67]) by mx.google.com with ESMTP id b8si5247507plb.351.2019.05.24.11.52.06; Fri, 24 May 2019 11:52:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=Kbigf6+x; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391510AbfEXSuz (ORCPT + 99 others); Fri, 24 May 2019 14:50:55 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:44353 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728920AbfEXSuy (ORCPT ); Fri, 24 May 2019 14:50:54 -0400 Received: by mail-lj1-f196.google.com with SMTP id e13so9514384ljl.11 for ; Fri, 24 May 2019 11:50:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=QOpX777PdKYx2FzNZIOtxcAjmxm00VhvM8DiVIi+gic=; b=Kbigf6+x+ocH2AyNwOQs10+zTlWsKMDO9/R3dOcVtJEsfBiTdREjTIWj0JV6CHVW+P 0bdYxs0w5RFKDgoUO42v7CMvChE8nv/xYh1q2Pwve6NgLoq5FqSTUgD1HUm1NblF3zzo BjoFzOiEbYKqPd3c1BR5RbEaQi/NryGeokfcK84JXj1XAGhH9MoyYskyhgnH8RaQ5CLj WR79xxBWypA2Q46vSqio9b+1968KuT6l05TTPXDmyXuLIWiHRatJxbPHbSsn6J0rCafx di0JDLlRn6HJQZ0l2MVpuMDllwCLWJhHUj1Dq8BE8n0Ik7OugIwaEmocHbbgpECtINYi FFiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=QOpX777PdKYx2FzNZIOtxcAjmxm00VhvM8DiVIi+gic=; b=SzVwGq7cDHCzF7oSj8heFjHs2DXr0ek3b4ytayCOBvstRv3Mq6cI0WBl/CppPGLlJU p9/NqTHuCvvvuOfCPKw/nM8Sf2zo/ieFHNUYn1JWIwSOsKSycBMRKIzSXhNqx0ES2K4Y umpjGCCeQOX0pQGkytSRJZR5Wdh8RFMcOS09KGKP5shOfvXGq9lzvMP6slGwNjRuNhSV eRwX4wrNGz1ru+Yk3Cdy7FpGvYUrvi/ecMUOAihBQGzizLaVqFC2WRPPDsOlqbnrFpvv OgKOfivzZrEKmS2Fi6gofggmfbwWwtIpOAAPWLL1wIZnsVGdUR1gPq8ZWAU9nffPPpF8 aUuw== X-Gm-Message-State: APjAAAWNR85slR1EqOLNfvNfgLY3owG+PozAsPA9CI0pnHiyi3CmhZil Db+/3HiTBjz5leNLy2k42gSO9GYWyLOZufYsB91fow== X-Received: by 2002:a2e:8587:: with SMTP id b7mr42887354lji.101.1558723852754; Fri, 24 May 2019 11:50:52 -0700 (PDT) MIME-Version: 1.0 References: <1558648540-14239-1-git-send-email-alan.mikhak@sifive.com> In-Reply-To: From: Alan Mikhak Date: Fri, 24 May 2019 11:50:41 -0700 Message-ID: Subject: Re: [PATCH v2] PCI: endpoint: Skip odd BAR when skipping 64bit BAR To: Kishon Vijay Abraham I Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, lorenzo.pieralisi@arm.com, linux-riscv@lists.infradead.org, Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , gustavo.pimentel@synopsys.com, wen.yang99@zte.com.cn, kjlu@umn.edu Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kishon, Yes. This change is still applicable even when the platform specifies that it only supports 64-bit BARs by setting the bar_fixed_64bit member of epc_features. The issue being fixed is this: If the 'continue' statement is executed within the loop, the loop index 'bar' needs to advanced by two, not one, when the BAR is 64-bit. Otherwise the next loop iteration will be on an odd BAR which doesn't exist. The PCI_BASE_ADDRESS_MEM_TYPE_64 flag in epf_bar->flag reflects the value set by the platform in the bar_fixed_64bit member of epc_features. This patch moves the checking of PCI_BASE_ADDRESS_MEM_TYPE_64 in epf_bar->flags to before the 'continue' statement to advance the 'bar' loop index accordingly. The comment you see about 'pci_epc_set_bar()' preceding the moved code is the original comment and was also moved along with the code. Regards, Alan Mikhak On Fri, May 24, 2019 at 1:51 AM Kishon Vijay Abraham I wrote: > > Hi, > > On 24/05/19 5:25 AM, Alan Mikhak wrote: > > +Bjorn Helgaas, +Gustavo Pimentel, +Wen Yang, +Kangjie Lu > > > > On Thu, May 23, 2019 at 2:55 PM Alan Mikhak wrote: > >> > >> Always skip odd bar when skipping 64bit BARs in pci_epf_test_set_bar() > >> and pci_epf_test_alloc_space(). > >> > >> Otherwise, pci_epf_test_set_bar() will call pci_epc_set_bar() on odd loop > >> index when skipping reserved 64bit BAR. Moreover, pci_epf_test_alloc_space() > >> will call pci_epf_alloc_space() on bind for odd loop index when BAR is 64bit > >> but leaks on subsequent unbind by not calling pci_epf_free_space(). > >> > >> Signed-off-by: Alan Mikhak > >> Reviewed-by: Paul Walmsley > >> --- > >> drivers/pci/endpoint/functions/pci-epf-test.c | 25 ++++++++++++------------- > >> 1 file changed, 12 insertions(+), 13 deletions(-) > >> > >> diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c > >> index 27806987e93b..96156a537922 100644 > >> --- a/drivers/pci/endpoint/functions/pci-epf-test.c > >> +++ b/drivers/pci/endpoint/functions/pci-epf-test.c > >> @@ -389,7 +389,7 @@ static void pci_epf_test_unbind(struct pci_epf *epf) > >> > >> static int pci_epf_test_set_bar(struct pci_epf *epf) > >> { > >> - int bar; > >> + int bar, add; > >> int ret; > >> struct pci_epf_bar *epf_bar; > >> struct pci_epc *epc = epf->epc; > >> @@ -400,8 +400,14 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) > >> > >> epc_features = epf_test->epc_features; > >> > >> - for (bar = BAR_0; bar <= BAR_5; bar++) { > >> + for (bar = BAR_0; bar <= BAR_5; bar += add) { > >> epf_bar = &epf->bar[bar]; > >> + /* > >> + * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 > >> + * if the specific implementation required a 64-bit BAR, > >> + * even if we only requested a 32-bit BAR. > >> + */ > > set_bar shouldn't set PCI_BASE_ADDRESS_MEM_TYPE_64. If a platform supports only > 64-bit BAR, that should be specified in epc_features bar_fixed_64bit member. > > Thanks > Kishon