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[209.132.180.67]) by mx.google.com with ESMTP id h3si15998218pjs.104.2019.05.27.02.07.02; Mon, 27 May 2019 02:07:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726793AbfE0JFo (ORCPT + 99 others); Mon, 27 May 2019 05:05:44 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:31019 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726691AbfE0JFn (ORCPT ); Mon, 27 May 2019 05:05:43 -0400 X-UUID: ac4d7903a2d842ef9a7cced47deaeb51-20190527 X-UUID: ac4d7903a2d842ef9a7cced47deaeb51-20190527 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 535520483; Mon, 27 May 2019 17:05:22 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 27 May 2019 17:05:20 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 27 May 2019 17:05:20 +0800 From: Erin Lo To: Matthias Brugger , Rob Herring , Mark Rutland CC: , srv_heupstream , , , , , , , , Michael Mei Subject: [PATCH v11 6/6] arm64: dts: mt8183: add efuse and Mediatek Chip id node to read Date: Mon, 27 May 2019 17:04:47 +0800 Message-ID: <1558947887-31084-7-git-send-email-erin.lo@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1558947887-31084-1-git-send-email-erin.lo@mediatek.com> References: <1558947887-31084-1-git-send-email-erin.lo@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: BC6772C244BE5BC8E09530FE258C73FF60A08144B109D9253A4ADFC41D8847CA2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Michael Mei support for reading chip ID and efuse Signed-off-by: Michael Mei Signed-off-by: Erin Lo --- This patch is based on this patch: https://patchwork.kernel.org/patch/10953029/ --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 2e3063f..c2749c4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -156,6 +156,15 @@ compatible = "simple-bus"; ranges; + soc_data: soc_data@8000000 { + compatible = "mediatek,mt8183-efuse", + "mediatek,efuse"; + reg = <0 0x08000000 0 0x0010>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + gic: interrupt-controller@c000000 { compatible = "arm,gic-v3"; #interrupt-cells = <4>; @@ -369,6 +378,12 @@ #clock-cells = <1>; }; + efuse: efuse@11f10000 { + compatible = "mediatek,mt8183-efuse", + "mediatek,efuse"; + reg = <0 0x11f10000 0 0x1000>; + }; + mfgcfg: syscon@13000000 { compatible = "mediatek,mt8183-mfgcfg", "syscon"; reg = <0 0x13000000 0 0x1000>; -- 1.8.1.1.dirty