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[209.132.180.67]) by mx.google.com with ESMTP id o13si16575722pgv.288.2019.05.27.02.07.06; Mon, 27 May 2019 02:07:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726819AbfE0JFq (ORCPT + 99 others); Mon, 27 May 2019 05:05:46 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:33850 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726684AbfE0JFm (ORCPT ); Mon, 27 May 2019 05:05:42 -0400 X-UUID: f1a760e490f7477390f796c5b5565aa0-20190527 X-UUID: f1a760e490f7477390f796c5b5565aa0-20190527 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1113039921; Mon, 27 May 2019 17:05:11 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 27 May 2019 17:05:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 27 May 2019 17:05:09 +0800 From: Erin Lo To: Matthias Brugger , Rob Herring , Mark Rutland CC: , srv_heupstream , , , , , , , , "Hsin-Yi, Wang" Subject: [PATCH v11 2/6] arm64: dts: mt8183: add capacity-dmips-mhz Date: Mon, 27 May 2019 17:04:43 +0800 Message-ID: <1558947887-31084-3-git-send-email-erin.lo@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1558947887-31084-1-git-send-email-erin.lo@mediatek.com> References: <1558947887-31084-1-git-send-email-erin.lo@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: BEBDBD6161B4C7896DDE90CE14127A1A65E236348D2D7160142575FA14673EBB2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "Hsin-Yi, Wang" Pinned the frequency to the max and run dhrystone to get the value. little cpu: 11071 (max freq: 1989000) big cpu: 15293 (max freq: 1989000) 11071 : 15293 ~= 741 : 1024 Signed-off-by: Erin Lo Signed-off-by: Hsin-Yi Wang --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 08274bf..5b34ec6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -56,6 +56,7 @@ compatible = "arm,cortex-a53"; reg = <0x000>; enable-method = "psci"; + capacity-dmips-mhz = <741>; }; cpu1: cpu@1 { @@ -63,6 +64,7 @@ compatible = "arm,cortex-a53"; reg = <0x001>; enable-method = "psci"; + capacity-dmips-mhz = <741>; }; cpu2: cpu@2 { @@ -70,6 +72,7 @@ compatible = "arm,cortex-a53"; reg = <0x002>; enable-method = "psci"; + capacity-dmips-mhz = <741>; }; cpu3: cpu@3 { @@ -77,6 +80,7 @@ compatible = "arm,cortex-a53"; reg = <0x003>; enable-method = "psci"; + capacity-dmips-mhz = <741>; }; cpu4: cpu@100 { @@ -84,6 +88,7 @@ compatible = "arm,cortex-a73"; reg = <0x100>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; }; cpu5: cpu@101 { @@ -91,6 +96,7 @@ compatible = "arm,cortex-a73"; reg = <0x101>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; }; cpu6: cpu@102 { @@ -98,6 +104,7 @@ compatible = "arm,cortex-a73"; reg = <0x102>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; }; cpu7: cpu@103 { @@ -105,6 +112,7 @@ compatible = "arm,cortex-a73"; reg = <0x103>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; }; }; -- 1.8.1.1.dirty