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Subject: Re: [PATCH 4.19 049/114] iommu/tegra-smmu: Fix invalid ASID bits on
 Tegra30/114
To:     Pavel Machek <pavel@ucw.cz>
Cc:     linux-kernel@vger.kernel.org, Thierry Reding <treding@nvidia.com>,
        Joerg Roedel <jroedel@suse.de>
References: <20190523181731.372074275@linuxfoundation.org>
 <20190523181736.156742338@linuxfoundation.org>
 <20190527154647.GA4050@xo-6d-61-c0.localdomain>
From:   Dmitry Osipenko <digetx@gmail.com>
Message-ID: <4db677be-2c00-aad9-c630-669e284fd4ca@gmail.com>
Date:   Mon, 27 May 2019 20:12:32 +0300
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27.05.2019 18:46, Pavel Machek пишет:
> On Thu 2019-05-23 21:05:48, Greg Kroah-Hartman wrote:
>> From: Dmitry Osipenko <digetx@gmail.com>
>>
>> commit 43a0541e312f7136e081e6bf58f6c8a2e9672688 upstream.
>>
>> Both Tegra30 and Tegra114 have 4 ASID's and the corresponding bitfield of
>> the TLB_FLUSH register differs from later Tegra generations that have 128
>> ASID's.
>>
>> In a result the PTE's are now flushed correctly from TLB and this fixes
>> problems with graphics (randomly failing tests) on Tegra30.
> 
> 
> Three copies of same code... maybe its time to introduce helper function?
> 
Feel free to submit a patch if you think that something could be
improved. To me it is good as-is.