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From:   "james qian wang (Arm Technology China)" <james.qian.wang@arm.com>
To:     "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>
CC:     Liviu Dudau <Liviu.Dudau@arm.com>,
        "maarten.lankhorst@linux.intel.com" 
        <maarten.lankhorst@linux.intel.com>,
        "seanpaul@chromium.org" <seanpaul@chromium.org>,
        "airlied@linux.ie" <airlied@linux.ie>,
        Brian Starkey <Brian.Starkey@arm.com>,
        "Julien Yin (Arm Technology China)" <Julien.Yin@arm.com>,
        "Jonathan Chai (Arm Technology China)" <Jonathan.Chai@arm.com>,
        Ayan Halder <Ayan.Halder@arm.com>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        nd <nd@arm.com>
Subject: Re: [PATCH v3 2/2] drm/komeda: Adds limitation check for AFBC wide
 block not support Rot90
Thread-Topic: [PATCH v3 2/2] drm/komeda: Adds limitation check for AFBC wide
 block not support Rot90
Thread-Index: AQHVFRyPEKY9mC6X0Ei+tL8MecHyLw==
Date:   Tue, 28 May 2019 06:14:08 +0000
Message-ID: <20190528061400.GB14743@james-ThinkStation-P300>
References: <1559015784-18998-1-git-send-email-lowry.li@arm.com>
 <1559015784-18998-3-git-send-email-lowry.li@arm.com>
In-Reply-To: <1559015784-18998-3-git-send-email-lowry.li@arm.com>
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On Tue, May 28, 2019 at 11:57:05AM +0800, Lowry Li (Arm Technology China) w=
rote:
> From: "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>
>=20
> Komeda series hardware doesn't support Rot90 for AFBC wide block. So
> add limitation check to reject it if such configuration has been posted.
>=20
> Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
> ---
>  drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c       | 15 ++++++++++++=
+++
>  .../gpu/drm/arm/display/komeda/komeda_format_caps.c    |  7 ++++++-
>  .../gpu/drm/arm/display/komeda/komeda_format_caps.h    |  8 +++++++-
>  .../gpu/drm/arm/display/komeda/komeda_framebuffer.c    | 18 +++++++++---=
------
>  .../gpu/drm/arm/display/komeda/komeda_framebuffer.h    |  5 +++--
>  .../gpu/drm/arm/display/komeda/komeda_pipeline_state.c |  8 +++++++-
>  drivers/gpu/drm/arm/display/komeda/komeda_plane.c      |  2 +-
>  7 files changed, 48 insertions(+), 15 deletions(-)
>=20
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/g=
pu/drm/arm/display/komeda/d71/d71_dev.c
> index 1c914f8..4563c2a 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> @@ -494,11 +494,26 @@ static int d71_enum_resources(struct komeda_dev *md=
ev)
>  	{__HW_ID(6, 7),	0/*DRM_FORMAT_YUV420_10BIT*/, 1,	RICH,	Rot_ALL_H_V,	LYT=
_NM, AFB_TH},
>  };
> =20
> +static bool d71_format_mod_supported(const struct komeda_format_caps *ca=
ps,
> +				     u32 layer_type, u64 modifier, u32 rot)
> +{
> +	uint64_t layout =3D modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK;
> +
> +	if ((layout =3D=3D AFBC_FORMAT_MOD_BLOCK_SIZE_32x8) &&
> +	    drm_rotation_90_or_270(rot)) {
> +		DRM_DEBUG_ATOMIC("D71 doesn't support ROT90 for WB-AFBC.\n");
> +		return false;
> +	}
> +
> +	return true;
> +}
> +
>  static void d71_init_fmt_tbl(struct komeda_dev *mdev)
>  {
>  	struct komeda_format_caps_table *table =3D &mdev->fmt_tbl;
> =20
>  	table->format_caps =3D d71_format_caps_table;
> +	table->format_mod_supported =3D d71_format_mod_supported;
>  	table->n_formats =3D ARRAY_SIZE(d71_format_caps_table);
>  }
> =20
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/dr=
ivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
> index b219514..cd4d9f5 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
> @@ -74,7 +74,8 @@
>  };
> =20
>  bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
> -				 u32 layer_type, u32 fourcc, u64 modifier)
> +				 u32 layer_type, u32 fourcc, u64 modifier,
> +				 u32 rot)
>  {
>  	const struct komeda_format_caps *caps;
> =20
> @@ -85,6 +86,10 @@ bool komeda_format_mod_supported(struct komeda_format_=
caps_table *table,
>  	if (!(caps->supported_layer_types & layer_type))
>  		return false;
> =20
> +	if (table->format_mod_supported)
> +		return table->format_mod_supported(caps, layer_type, modifier,
> +						   rot);
> +
>  	return true;
>  }
> =20
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/dr=
ivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
> index 96de22e..381e873 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
> @@ -71,10 +71,15 @@ struct komeda_format_caps {
>   *
>   * @n_formats: the size of format_caps list.
>   * @format_caps: format_caps list.
> + * @format_mod_supported: Optional. Some HW may have special requirement=
s or
> + * limitations which can not be described by format_caps, this func supp=
ly HW
> + * the ability to do the further HW specific check.
>   */
>  struct komeda_format_caps_table {
>  	u32 n_formats;
>  	const struct komeda_format_caps *format_caps;
> +	bool (*format_mod_supported)(const struct komeda_format_caps *caps,
> +				     u32 layer_type, u64 modifier, u32 rot);
>  };
> =20
>  extern u64 komeda_supported_modifiers[];
> @@ -100,6 +105,7 @@ u32 *komeda_get_layer_fourcc_list(struct komeda_forma=
t_caps_table *table,
>  void komeda_put_fourcc_list(u32 *fourcc_list);
> =20
>  bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
> -				 u32 layer_type, u32 fourcc, u64 modifier);
> +				 u32 layer_type, u32 fourcc, u64 modifier,
> +				 u32 rot);
> =20
>  #endif
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/dr=
ivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
> index d0e713a..5f63dec 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
> @@ -240,20 +240,20 @@ struct drm_framebuffer *
>  }
> =20
>  /* if the fb can be supported by a specific layer */
> -bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type)
> +bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type,
> +				  u32 rot)
>  {
>  	struct drm_framebuffer *fb =3D &kfb->base;
>  	struct komeda_dev *mdev =3D fb->dev->dev_private;
> -	const struct komeda_format_caps *caps;
>  	u32 fourcc =3D fb->format->format;
>  	u64 modifier =3D fb->modifier;
> +	bool supported;
> =20
> -	caps =3D komeda_get_format_caps(&mdev->fmt_tbl, fourcc, modifier);
> -	if (!caps)
> -		return false;
> +	supported =3D komeda_format_mod_supported(&mdev->fmt_tbl, layer_type,
> +						fourcc, modifier, rot);
> +	if (!supported)
> +		DRM_DEBUG_ATOMIC("Layer TYPE: %d doesn't support fb FMT: %s.\n",
> +			layer_type, komeda_get_format_name(fourcc, modifier));
> =20
> -	if (!(caps->supported_layer_types & layer_type))
> -		return false;
> -
> -	return true;
> +	return supported;
>  }
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h b/dr=
ivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
> index e3bab0d..6cbb2f6 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
> @@ -35,9 +35,10 @@ struct komeda_fb {
> =20
>  struct drm_framebuffer *
>  komeda_fb_create(struct drm_device *dev, struct drm_file *file,
> -		 const struct drm_mode_fb_cmd2 *mode_cmd);
> +		const struct drm_mode_fb_cmd2 *mode_cmd);
>  dma_addr_t
>  komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane)=
;
> -bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type)=
;
> +bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type,
> +		u32 rot);
> =20
>  #endif
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b=
/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
> index 34737c0..042d4d7 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
> @@ -274,6 +274,11 @@ struct komeda_pipeline_state *
>  		       struct komeda_plane_state *kplane_st,
>  		       struct komeda_data_flow_cfg *dflow)
>  {
> +	struct komeda_fb *kfb =3D to_kfb(kplane_st->base.fb);
> +
> +	if (!komeda_fb_is_layer_supported(kfb, layer->layer_type, dflow->rot))
> +		return -EINVAL;
> +
>  	if (!in_range(&layer->hsize_in, dflow->in_w)) {
>  		DRM_DEBUG_ATOMIC("src_w: %d is out of range.\n", dflow->in_w);
>  		return -EINVAL;
> @@ -359,7 +364,8 @@ struct komeda_pipeline_state *
>  	struct komeda_layer_state *st;
>  	int i;
> =20
> -	if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type))
> +	if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type,
> +					  dflow->rot))
>  		return -EINVAL;
> =20
>  	c_st =3D komeda_component_get_state_and_set_user(&wb_layer->base,
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/=
gpu/drm/arm/display/komeda/komeda_plane.c
> index c9f37ff..798ee24 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
> @@ -216,7 +216,7 @@ static void komeda_plane_reset(struct drm_plane *plan=
e)
>  	u32 layer_type =3D kplane->layer->layer_type;
> =20
>  	return komeda_format_mod_supported(&mdev->fmt_tbl, layer_type,
> -					   format, modifier);
> +					   format, modifier, 0);
>  }
> =20
>  static const struct drm_plane_funcs komeda_plane_funcs =3D {
> --=20
> 1.9.1
>=20

LGTM.

Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.co=
m>