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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id f29sm22891098pfq.11.2019.05.28.09.46.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 May 2019 09:46:24 -0700 (PDT) From: Jeffrey Hugo Cc: agross@kernel.org, david.brown@linaro.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, marc.w.gonzalez@free.fr, jcrouse@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jeffrey Hugo Subject: [PATCH 0/3] MSM8998 GPUCC Support Date: Tue, 28 May 2019 09:46:16 -0700 Message-Id: <20190528164616.38517-1-jeffrey.l.hugo@gmail.com> X-Mailer: git-send-email 2.17.1 To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Adreno GPU on MSM8998 has its own clock controller, which is a dependency for bringing up the GPU. This series gets the gpucc all in place as another step on the road to getting the GPU enabled. Jeffrey Hugo (3): dt-bindings: clock: Document gpucc for msm8998 clk: qcom: Add MSM8998 GPU Clock Controller (GPUCC) driver arm64: dts: qcom: msm8998: Add gpucc node .../devicetree/bindings/clock/qcom,gpucc.txt | 4 +- arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gpucc-msm8998.c | 364 ++++++++++++++++++ .../dt-bindings/clock/qcom,gpucc-msm8998.h | 29 ++ 6 files changed, 420 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/qcom/gpucc-msm8998.c create mode 100644 include/dt-bindings/clock/qcom,gpucc-msm8998.h -- 2.17.1