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[209.132.180.67]) by mx.google.com with ESMTP id q82si4639181pfc.12.2019.05.30.15.26.50; Thu, 30 May 2019 15:27:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=SnOvK8D+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726576AbfE3WZp (ORCPT + 99 others); Thu, 30 May 2019 18:25:45 -0400 Received: from mail-yw1-f68.google.com ([209.85.161.68]:43487 "EHLO mail-yw1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726045AbfE3WZp (ORCPT ); Thu, 30 May 2019 18:25:45 -0400 Received: by mail-yw1-f68.google.com with SMTP id t5so3302129ywf.10; Thu, 30 May 2019 15:25:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :content-transfer-encoding; bh=Kt2e7koKuS/w3st+6pWFlXYytQQLT+iijBY66G3TGIQ=; b=SnOvK8D+8dpl/JHjhGSOn/PI1ZA6KFmskkWxxxQdlclHWjqHzPvtclCjTKeO36GZOk ihwqNfm97yuAToZWuIj0NmC4XoK2WRFV69VbOVUfDRHKnbEheioPoQ9qmBbLxo5RkE7P ia3nHxPpgZEUCunu1GQ1HXOwUd1dKSMjMGiwTQjwRQSPQh+chTyTkBJtmEYGuhzP0cj0 iOVE8gfcOErvVpykcJUqnxo16i4XNxAXatTaPEm8VCHg8ipPrl424x+xKOHuRFwCGQtB qlapFWyryZ5rN+EI/cj+vyzzmCrtcU/DyfdkA+du4y8ZK4UgqN6DtNR/wZ/fIob5aoeG jnNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:content-transfer-encoding; bh=Kt2e7koKuS/w3st+6pWFlXYytQQLT+iijBY66G3TGIQ=; b=rTkERJhYCaIeP0ezuDkpCbTR1GFCE99yOO3PkpZ8hSL21lzgZFbJnN9bDWmvHfUhBl Lgo0lN6A2AdiPJxfuTjR2wjs4FJQRi84W556HVS494U9mLdf+NQ9uVPJmrOeUbW7VICX cUv+dvpkNx+eBDmmzwoYGJkcNd3IP/Q1K5wDegV+41836BD+oeJ+ui7QOOanc7TAn1EB DMkQsv44uJz/oPmGsvnCBx9AdjCmU5jd3p2mvDqRXeGm9mDdrk36KlAiofxcgV3RfSHu CmbI/Cq3mQZvRCUOYB68ydpiNrzskTg5SrL0YTZoOTaLkV9rJfubqfP9crqm4mfjPrWO dgBg== X-Gm-Message-State: APjAAAW6KW7Zrnvb0aw8o6jIMT3t9rvyafSr9AWR8/YyibRC9etIr6iN UBfSaI6ugr/FQIkLfYlnPRYINqISGPj+kRJdbMY= X-Received: by 2002:a81:59c2:: with SMTP id n185mr3501471ywb.21.1559255144144; Thu, 30 May 2019 15:25:44 -0700 (PDT) MIME-Version: 1.0 References: <20190528161440.27172-1-peron.clem@gmail.com> <20190528161440.27172-11-peron.clem@gmail.com> <20190530145550.amalnxmx7kpokykv@core.my.home> In-Reply-To: <20190530145550.amalnxmx7kpokykv@core.my.home> From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Date: Fri, 31 May 2019 00:25:32 +0200 Message-ID: Subject: Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node To: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= , Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , devicetree , linux-kernel , linux-sunxi , linux-arm-kernel , linux-media@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ondrej, On Thu, 30 May 2019 at 16:55, Ond=C5=99ej Jirman wrote: > > Hello Cl=C3=A9ment, > > On Tue, May 28, 2019 at 06:14:38PM +0200, Cl=C3=A9ment P=C3=A9ron wrote: > > Allwinner H6 IR is similar to A31 and can use same driver. > > > > Add support for it. > > > > Signed-off-by: Cl=C3=A9ment P=C3=A9ron > > --- > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/= boot/dts/allwinner/sun50i-h6.dtsi > > index 16c5c3d0fd81..649cbdfe452e 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > @@ -647,6 +647,25 @@ > > pins =3D "PL0", "PL1"; > > function =3D "s_i2c"; > > }; > > + > > + r_ir_rx_pin: r-ir-rx-pin { > > + pins =3D "PL9"; > > + function =3D "s_cir_rx"; > > + }; > > + }; > > + > > + r_ir: ir@7040000 { > > + compatible =3D "allwinner,sun50i-h6-ir", > > + "allwinner,sun6i-a31-ir"; > > + reg =3D <0x07040000 0x400>; > > + interrupts =3D ; > > + clocks =3D <&r_ccu CLK_R_APB1_IR>, > > + <&r_ccu CLK_IR>; > > + clock-names =3D "apb", "ir"; > > + resets =3D <&r_ccu RST_R_APB1_IR>; > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&r_ir_rx_pin>; > > + status =3D "disabled"; > > }; > > Please make a comment here, that this is known broken on some boards and = may > result IRQ flood if enabled. Otherwise noone will know. I'm planning to send a v4 next week with the IRQ_NONE return as Maxime suggested it. https://github.com/clementperon/linux/tree/h6_ir_v4 But maybe we could also use the bit 5 of the IRQ status. Regards, Clement > > thanks, > o. > > > r_i2c: i2c@7081400 { > > -- > > 2.20.1 > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel