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From:   "Kang, Luwei" <luwei.kang@intel.com>
To:     "Christopherson, Sean J" <sean.j.christopherson@intel.com>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
        "pbonzini@redhat.com" <pbonzini@redhat.com>,
        "rkrcmar@redhat.com" <rkrcmar@redhat.com>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "bp@alien8.de" <bp@alien8.de>, "hpa@zytor.com" <hpa@zytor.com>,
        "x86@kernel.org" <x86@kernel.org>
Subject: RE: [PATCH] KVM: LAPIC: Do not mask the local interrupts when LAPIC
 is sw disabled
Thread-Topic: [PATCH] KVM: LAPIC: Do not mask the local interrupts when
 LAPIC is sw disabled
Thread-Index: AQHVD8I2LU4/pRFEgkiaWmh/P2D76KaDijsAgAFc1nA=
Date:   Fri, 31 May 2019 08:11:12 +0000
Message-ID: <82D7661F83C1A047AF7DC287873BF1E172DAE266@SHSMSX101.ccr.corp.intel.com>
References: <1558435455-233679-1-git-send-email-luwei.kang@intel.com>
 <20190530184602.GD23930@linux.intel.com>
In-Reply-To: <20190530184602.GD23930@linux.intel.com>
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> -----Original Message-----
> From: Christopherson, Sean J
> Sent: Friday, May 31, 2019 2:46 AM
> To: Kang, Luwei <luwei.kang@intel.com>
> Cc: linux-kernel@vger.kernel.org; kvm@vger.kernel.org; pbonzini@redhat.com; rkrcmar@redhat.com; tglx@linutronix.de;
> mingo@redhat.com; bp@alien8.de; hpa@zytor.com; x86@kernel.org
> Subject: Re: [PATCH] KVM: LAPIC: Do not mask the local interrupts when LAPIC is sw disabled
> 
> On Tue, May 21, 2019 at 06:44:15PM +0800, Luwei Kang wrote:
> > The current code will mask all the local interrupts in the local
> > vector table when the LAPIC is disabled by SVR (Spurious-Interrupt
> > Vector Register) "APIC Software Enable/Disable" flag (bit8).
> > This may block local interrupt be delivered to target vCPU even if
> > LAPIC is enabled by set SVR (bit8 == 1) after.
> 
> The current code aligns with the SDM, which states:
> 
>   Local APIC State After It Has Been Software Disabled
> 
>   When the APIC software enable/disable flag in the spurious interrupt
>   vector register has been explicitly cleared (as opposed to being cleared
>   during a power up or reset), the local APIC is temporarily disabled.
>   The operation and response of a local APIC while in this software-
>   disabled state is as follows:
> 
>     - The mask bits for all the LVT entries are set. Attempts to reset
>       these bits will be ignored.

Thanks for Sean's reminder. 
I make this patch because I found the PMI from Intel PT can't be inject to target vCPU when there have multi vCPU in guest and the Intel PT interrupt happened on not the first vCPU (i.e. not vCPU0).  The interrupt blocked in kvm_apic_local_deliver() function and can't pass the APIC_LVT_MASKED flag check (LVTPC is masked from start to end). The KVM Guest will enabled the LVTPC during LAPIC is software disabled and enabled LAPIC after during VM bootup, but LVTPC is still disabled. Guest PT driver didn't enabled LVTPC before enable PT as well. But the Guest performance monitor counter driver will enabled LVTPC in each time before using PMU. I will do more check on this. Thank you.

Luwei Kang