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From:   Fabio Estevam <festevam@gmail.com>
Date:   Fri, 31 May 2019 08:39:49 -0300
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Subject: Re: [PATCH 2/3] arm64: dts: freescale: Add i.MX8MN dtsi support
To:     Yongcai Huang <Anson.Huang@nxp.com>
Cc:     Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
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        Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
        Bruno Thomsen <bruno.thomsen@gmail.com>,
        Dong Aisheng <aisheng.dong@nxp.com>,
        Ping Bai <ping.bai@nxp.com>, Li Yang <leoyang.li@nxp.com>,
        Lucas Stach <l.stach@pengutronix.de>, pankaj.bansal@nxp.com,
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On Thu, May 30, 2019 at 6:45 AM <Anson.Huang@nxp.com> wrote:

> +                       gpio1: gpio@30200000 {
> +                               compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> +                               reg = <0x30200000 0x10000>;
> +                               interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
> +                                            <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;

No GPIO clocks entries?

> +                       usbphynop1: usbphynop1 {
> +                               compatible = "usb-nop-xceiv";
> +                               clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> +                               assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> +                               assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
> +                               clock-names = "main_clk";
> +                       };

 usbphynop1 does not have any registers associated, so it should be
placed outside the soc.

Building with W=1 should warn you about that.

> +                       usbphynop2: usbphynop2 {
> +                               compatible = "usb-nop-xceiv";
> +                               clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> +                               assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> +                               assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
> +                               clock-names = "main_clk";
> +                       };
> +

Ditto