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([2a01:e34:ef2d:6ba0:253d:2607:4c91:6144]) by smtp.googlemail.com with ESMTPSA id v11sm1393923wmh.28.2019.05.31.13.31.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 May 2019 13:31:12 -0700 (PDT) Subject: Re: [PATCH v3 0/8] NVIDIA Tegra clocksource driver improvements To: Dmitry Osipenko , Peter De Schrijver Cc: Thomas Gleixner , Joseph Lo , Thierry Reding , Jonathan Hunter , linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Nicolas Chauvet References: <20190524153253.28564-1-digetx@gmail.com> <20190531082634.GA6070@pdeschrijver-desktop.Nvidia.com> From: Daniel Lezcano Openpgp: preference=signencrypt Autocrypt: addr=daniel.lezcano@linaro.org; prefer-encrypt=mutual; keydata= mQINBFv/yykBEADDdW8RZu7iZILSf3zxq5y8YdaeyZjI/MaqgnvG/c3WjFaunoTMspeusiFE sXvtg3ehTOoyD0oFjKkHaia1Zpa1m/gnNdT/WvTveLfGA1gH+yGes2Sr53Ht8hWYZFYMZc8V 2pbSKh8wepq4g8r5YI1XUy9YbcTdj5mVrTklyGWA49NOeJz2QbfytMT3DJmk40LqwK6CCSU0 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iqWjuat8/HWc01yEd8rtkGuUcMqbCi1XhcAmkaOnX8FYscMRoyyMrWClRZEQRokqZIj79+PR adkDXtr4MeL8BaB7Ij2oyRVjXUwhFQNKi5Z5Rve0a3zvGkkqw8Mz20BOksjSWjAF6g9byukl CUVjC03PdMSufNLK06x5hPc/c4tFR4J9cLrV+XxdCX7r0zGos9SzTPGNuIk1LK++S3EJhLFj 4eoWtNhMWc1uiTf9ENza0ntqH9XBWEQ6IA1gubCniGG+Xg== Message-ID: <26aeb9f0-5eb1-005a-02c1-4d785fe70331@linaro.org> Date: Fri, 31 May 2019 22:31:11 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 31/05/2019 14:33, Dmitry Osipenko wrote: > 31.05.2019 11:26, Peter De Schrijver пишет: >> On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: >>> Hello, >>> >>> This series primarily unifies the driver code across all Tegra SoC >>> generations. In a result the clocksources are allocated per-CPU on >>> older Tegra's and have a higher rating than the arch-timer, the newer >>> Tegra210 is getting support for microsecond clocksource and the driver's >>> code is getting much cleaner. Note that arch-timer usage is discouraged on >>> all Tegra's due to the time jitter caused by the CPU frequency scaling. >> >> I think the limitations are more as follows: >> >> Chip timer suffers cpu dvfs jitter can wakeup from cc7 >> T20 us-timer No Yes >> T20 twd timer Yes No? >> T30 us-timer No Yes >> T30 twd timer Yes No? >> T114 us-timer No Yes >> T114 arch timer No Yes >> T124 us-timer No Yes >> T124 arch timer No Yes >> T210 us-timer No Yes >> T210 arch timer No No >> T210 clk_m timer No Yes >> >> right? > > Doesn't arch timer run off the CPU clock? If yes (that's what I > assumed), then it should be affected by the DVFS. Otherwise I'll lower > the clocksource's rating for T114/124/132. > > TWD can't wake CPU from the power-down state, so it's a solid "No" for > TWD in the "can wakeup from cc7" column. Wouldn't make sense to rename the timer-tegra20.c to timer-tegra.c now ? -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog