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[217.76.161.89]) by smtp.gmail.com with ESMTPSA id y133sm4868583wmg.5.2019.06.02.01.01.30 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sun, 02 Jun 2019 01:01:31 -0700 (PDT) From: Paul Walmsley To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou Subject: [PATCH 1/5] arch: riscv: add support for building DTB files from DT source data Date: Sun, 2 Jun 2019 01:01:22 -0700 Message-Id: <20190602080126.31075-2-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190602080126.31075-1-paul.walmsley@sifive.com> References: <20190602080126.31075-1-paul.walmsley@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Similar to ARM64, add support for building DTB files from DT source data for RISC-V boards. This patch starts with the infrastructure needed for SiFive boards. Boards from other vendors would add support here in a similar form. Signed-off-by: Paul Walmsley Signed-off-by: Paul Walmsley Cc: Palmer Dabbelt Cc: Albert Ou --- arch/riscv/boot/dts/Makefile | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 arch/riscv/boot/dts/Makefile diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile new file mode 100644 index 000000000000..dcc3ada78455 --- /dev/null +++ b/arch/riscv/boot/dts/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +subdir-y += sifive -- 2.20.1