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Date:   Mon, 3 Jun 2019 17:06:21 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc:     Vivien Didelot <vivien.didelot@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        "David S. Miller" <davem@davemloft.net>,
        Rasmus Villemoes <Rasmus.Villemoes@prevas.se>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next v3 07/10] net: dsa: mv88e6xxx: implement
 port_link_state for mv88e6250
Message-ID: <20190603150621.GF19627@lunn.ch>
References: <20190603144112.27713-1-rasmus.villemoes@prevas.dk>
 <20190603144112.27713-8-rasmus.villemoes@prevas.dk>
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On Mon, Jun 03, 2019 at 02:42:20PM +0000, Rasmus Villemoes wrote:
> The mv88e6250 has a rather different way of reporting the link, speed
> and duplex status. A simple difference is that the link bit is bit 12
> rather than bit 11 of the port status register.
> 
> It gets more complicated for speed and duplex, which do not have
> separate fields. Instead, there's a four-bit PortMode field, and
> decoding that depends on whether it's a phy or mii port. For the phy
> ports, only four of the 16 values have defined meaning; the rest are
> called "reserved", so returning {SPEED,DUPLEX}_UNKNOWN seems
> reasonable.
> 
> For the mii ports, most possible values are documented (0x3 and 0x5
> are reserved), but I'm unable to make sense of them all. Since the
> bits simply reflect the Px_MODE[3:0] configuration pins, just support
> the subset that I'm certain about. Support for other setups can be
> added later.

The code looks sensible and covers the most likely scenarios.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew