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[71.197.186.152]) by smtp.googlemail.com with ESMTPSA id i22sm15769445pfa.127.2019.06.03.15.12.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 Jun 2019 15:12:57 -0700 (PDT) From: Kevin Hilman To: Martin Blumenstingl , Neil Armstrong Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2] arm64: dts: meson: g12a: Add hwrng node In-Reply-To: References: <20190527125059.32010-1-narmstrong@baylibre.com> Date: Mon, 03 Jun 2019 15:12:56 -0700 Message-ID: <7hsgsqiahj.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Martin Blumenstingl writes: > On Mon, May 27, 2019 at 2:51 PM Neil Armstrong wrote: >> >> The Amlogic G12A has the hwrng module at the end of an unknown >> "EFUSE" bus. >> >> The hwrng is not enabled on the vendor G12A DTs, but is enabled on >> next generation SM1 SoC family sharing the exact same memory mapping. >> >> Let's add the "EFUSE" bus and the hwrng node. >> >> This hwrng has been checked with the rng-tools rngtest FIPS tool : >> rngtest: starting FIPS tests... >> rngtest: bits received from input: 1630240032 >> rngtest: FIPS 140-2 successes: 81436 >> rngtest: FIPS 140-2 failures: 76 >> rngtest: FIPS 140-2(2001-10-10) Monobit: 10 >> rngtest: FIPS 140-2(2001-10-10) Poker: 6 >> rngtest: FIPS 140-2(2001-10-10) Runs: 26 >> rngtest: FIPS 140-2(2001-10-10) Long run: 34 >> rngtest: FIPS 140-2(2001-10-10) Continuous run: 0 >> rngtest: input channel speed: (min=3.784; avg=5687.521; max=19073.486)Mibits/s >> rngtest: FIPS tests speed: (min=47.684; avg=52.348; max=52.835)Mibits/s >> rngtest: Program run time: 30000987 microseconds >> >> Signed-off-by: Neil Armstrong > Reviewed-by: Martin Blumenstingl Queued for v5.3, Thanks, Kevin