Received: by 2002:a25:ab43:0:0:0:0:0 with SMTP id u61csp4871431ybi; Mon, 3 Jun 2019 19:34:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqyGSejRwz6AkpaY+L2tVOLh/wMhU92wmBnf/DADR3xBfvj5PAK03j9+6Mtjax+0iF1BobOn X-Received: by 2002:a17:902:24b:: with SMTP id 69mr33820757plc.255.1559615688652; Mon, 03 Jun 2019 19:34:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559615688; cv=none; d=google.com; s=arc-20160816; b=eu5Zr/zcge53glm3b9ZXWtnmJGD9kjA4Z8b5O9DIrpcjVLDQVif2EIh8IE967FqhPL Nfj2lH2O1xG/B8HNF6f84DzBqYfh+t5/hWHKfQXAehU4pCN14hzuS7JZgZKFdLSZ3X+p M2BQLjP7/sjykDu5Wo9LMrvoQU1xduxpvyKUECtnCKL84PuWpnVbIpkSSVYi+BnxVh2a +9QueXgwkruvVnYjlTJqSaMOAR93SUQk0IQo3GtanRfnPDyg0gjjxpQvA+aAgZBRsWWE 5p4pdYoX0sm4Cni7dt25LPQdnqtRwAWcTZRHP0TqDRCq2qV4nCmuwG9yu5GvcilLvaLx pxJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=/efz5fBqwkKql5eaLioEbxPG0lpeX3IuNQzBKE0KZPY=; b=JRC/tqH10UU9QYSf/VjXhGts+/KySFIVWlCqoD+xc0sKoWs5MmrKT9WEJMAdxV5RQa PZTN97Qpaj681WfeJiG6A+TuCKpoVaYiThPlnrHpOFJPD4LmC47demwY4OcavE+ufvlZ wRZJaas2H8j9sHnHPaDHLbSXMyGxRB87DXf4okHm+dvv9uKFhd7mbphl9+8oopjooHNd GhjcGOUM1oMT9aW42AViAKf2uAU7r1PG66sW1o94WNhORdqnd4I+YAKCYwWs5Q9WGAJA r8qDgqgmkZexco3RxDUU4C81t+YO65RNr2JOaN3aH1Mw4hSpFyZ9lqYK2Ccua/X+HJI9 FL7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t0Tg5fNT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id co13si5618750plb.168.2019.06.03.19.34.32; Mon, 03 Jun 2019 19:34:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t0Tg5fNT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726603AbfFDCdW (ORCPT + 99 others); Mon, 3 Jun 2019 22:33:22 -0400 Received: from mail-oi1-f193.google.com ([209.85.167.193]:41013 "EHLO mail-oi1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726565AbfFDCdU (ORCPT ); Mon, 3 Jun 2019 22:33:20 -0400 Received: by mail-oi1-f193.google.com with SMTP id b21so10491562oic.8 for ; Mon, 03 Jun 2019 19:33:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/efz5fBqwkKql5eaLioEbxPG0lpeX3IuNQzBKE0KZPY=; b=t0Tg5fNTxniTRmz/iZalyXNNLBLd+1rhT2xgBa8LZbek9rqjAlwbOGh00WHUB1ncrx Yo/H4u0aKaaEw1LY3oxY/qG/vRwpEj/gpqna5xGRMKtyhf3tetBrPBVEq5/wW5OunbmT 6P+dBmhIXg4OTMvR81tWx1OWHYVdqp3+mTeW/erFR9g1OpVb3yvcUQDsNFS7/xBbe2Ix 099d7LnpWWUcDprl9p4V7TN5UkrBzPDwAaJK9fx2m9ZdntdbcTThl4RrqZGvB8aLAESR 7H5CqQB/OZL7Y8tzXpk5gqxdRBj4CkDWX7h78XUi9vUABQ5ElROPygSMfDoZJKEFAcyt 5New== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/efz5fBqwkKql5eaLioEbxPG0lpeX3IuNQzBKE0KZPY=; b=V/SQJHjAJioH+W/dXtPeHFN0+XfCygyuce+9NRDifW5alXNGZCyCY6r/hO0AIJIZxj +5lQx8jDrmIF5pCmFhivhUr/MseiszT67uN5UEY8UXDYV9zmMaMcM1lpNS3G9M/OP4NN bjJz3Tom1URS6IqZNKv1TrSIueCVZ+tBYhlrQ5VQAjEx2SdmjwnNG3oq5KESLZMbO2fD tjTVaekzSrAytDwMGIn0v1+Gs7JnjX9DeAkVqbgjseULyZ6nWUgjzSoxVOD9997Zo7Z+ 72OhW6K68JmUA/fE0ellQEuEZhdeREuSezO24otEeq5/8lA4jsoxYG0jcaWXIuLRPPfZ K4Uw== X-Gm-Message-State: APjAAAXZCccv0bshWiyekPWISFJ7E5290AwyV4F/d0F48J1Y7IO/f0MQ 8i58FX4zrfiQmzJYltjpRf4YJFSrmw0afrzyN/11zA== X-Received: by 2002:aca:dd08:: with SMTP id u8mr74850oig.27.1559615599920; Mon, 03 Jun 2019 19:33:19 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Baolin Wang Date: Tue, 4 Jun 2019 10:33:08 +0800 Message-ID: Subject: Re: [PATCH 2/9] dt-bindings: mmc: sprd: Add another optional clock documentation To: Ulf Hansson Cc: Adrian Hunter , Chunyan Zhang , Orson Zhai , Rob Herring , Mark Rutland , Arnd Bergmann , Olof Johansson , Vincent Guittot , arm-soc , Linux ARM , "linux-mmc@vger.kernel.org" , Linux Kernel Mailing List , DTML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ulf, On Mon, 3 Jun 2019 at 21:34, Ulf Hansson wrote: > > On Mon, 20 May 2019 at 12:12, Baolin Wang wrote: > > > > For some Spreadtrum platforms like SC9860 platform, we should enable another > > gate clock '2x_enable' to make the SD host controller work well. Thus add > > documentation for this optional clock. > > > > Signed-off-by: Baolin Wang > > --- > > .../devicetree/bindings/mmc/sdhci-sprd.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt > > index 45c9978..a285c77 100644 > > --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt > > +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt > > @@ -14,6 +14,7 @@ Required properties: > > - clock-names: Should contain the following: > > "sdio" - SDIO source clock (required) > > "enable" - gate clock which used for enabling/disabling the device (required) > > + "2x_enable" - gate clock controlling the device for some special platforms (optional) > > This is a bit vague, could you please elaborate (and fold in that > information to the doc) on what kind of clock this is? Sorry for confusing. For some Spreadtrum platfroms like SC9860 platform, we should enable 2 gate clocks to enable SD host controller, that means we have 2 serialized clock gates. I know that's a little weird, but that's our clock's design. -- Baolin Wang Best Regards