Received: by 2002:a25:ab43:0:0:0:0:0 with SMTP id u61csp5315228ybi; Tue, 4 Jun 2019 04:56:37 -0700 (PDT) X-Google-Smtp-Source: APXvYqx7TTe+YCOee7dCvSIhVs0fKG9zDUedm/haKg1mI1Xl4qvQCh4l3fM+MJo67jbTAmBMy0Nf X-Received: by 2002:a17:902:e301:: with SMTP id cg1mr17240900plb.184.1559649397716; Tue, 04 Jun 2019 04:56:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559649397; cv=none; d=google.com; s=arc-20160816; b=iV8nLOFKOfm+3NhS4UMDxGyJCeyYmajLg3OlHFE1GgjUDJmeILb6eL7pTfjuYxzpMM s3wv4Rp7B3jim5xj36fWmRWTT8fx0UwdmhYSc1KelZ+dqtbpFPBmbMeo9MOiqXNZD9RL dab5vL4vSIjhtR+T5M7OgfqWSa3T94lCJ7hW+8XARjp7xd62YgnBwzkr7KemNNoIQsKg zbU7kw7CbRj74QnE5EN9JZBV9HaG13H4+S2w3iiAgIkINer8WiNeMiohRNlVNcvKwpi1 9fIwgcRWWqHsghLhYe0J+FKUm0AZ8HdnxfWXm6eP5ruQh2PZU6bEm9ckVKMXlxfrMcRc 067w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:organization:autocrypt:openpgp:from:references:cc:to :subject; bh=DfQDg1xz+BMp7XpVfnercyTvHsa/RH7NhKyULsIGnCE=; b=hnj9tcx8ucGLBRDqNvs/rSG0MocKe0Vi2Q5J0rY8eC6tih+A9Ng09H/O0aqouj0MSJ 2eiKhu6T1J4sW6MlmzPxIoqpjowc+LDEYe7nlYzBebts91o4E9v6j+z0ia9hAcrh7ly0 KqLd4x9Wj7lFJ0UzOzbXpuhdMUZ8liToWDEtVuhaXcuu07cBmBREs9AsaqDGqz6r3S1G VqT5a5xFyDQeQ2o0j9O16biBbM4riM+c7ppsQvqlKE39ey9P1tjbZhUrDPV8IQtlJexh a79kXUgHvY7EDFKkdLmbKk/wdKAkg/+DeW0zChyDA1EDufqeKzlhB50e2GgMQRCHMnb4 qJVw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s11si22217656pgp.326.2019.06.04.04.56.20; Tue, 04 Jun 2019 04:56:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727554AbfFDLyz (ORCPT + 99 others); Tue, 4 Jun 2019 07:54:55 -0400 Received: from foss.arm.com ([217.140.101.70]:41320 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727250AbfFDLyz (ORCPT ); Tue, 4 Jun 2019 07:54:55 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ABD5680D; Tue, 4 Jun 2019 04:54:54 -0700 (PDT) Received: from [10.1.197.61] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 76C993F690; Tue, 4 Jun 2019 04:54:53 -0700 (PDT) Subject: Re: [PATCH V4 3/4] irqchip/irq-csky-mpintc: Support auto irq deliver to all cpus To: guoren@kernel.org, mark.rutland@arm.com, tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, jason@lakedaemon.net, linux-csky@vger.kernel.org, Guo Ren References: <1559646306-18860-1-git-send-email-guoren@kernel.org> <1559646306-18860-4-git-send-email-guoren@kernel.org> From: Marc Zyngier Openpgp: preference=signencrypt Autocrypt: addr=marc.zyngier@arm.com; prefer-encrypt=mutual; keydata= mQINBE6Jf0UBEADLCxpix34Ch3kQKA9SNlVQroj9aHAEzzl0+V8jrvT9a9GkK+FjBOIQz4KE g+3p+lqgJH4NfwPm9H5I5e3wa+Scz9wAqWLTT772Rqb6hf6kx0kKd0P2jGv79qXSmwru28vJ t9NNsmIhEYwS5eTfCbsZZDCnR31J6qxozsDHpCGLHlYym/VbC199Uq/pN5gH+5JHZyhyZiNW ozUCjMqC4eNW42nYVKZQfbj/k4W9xFfudFaFEhAf/Vb1r6F05eBP1uopuzNkAN7vqS8XcgQH qXI357YC4ToCbmqLue4HK9+2mtf7MTdHZYGZ939OfTlOGuxFW+bhtPQzsHiW7eNe0ew0+LaL 3wdNzT5abPBscqXWVGsZWCAzBmrZato+Pd2bSCDPLInZV0j+rjt7MWiSxEAEowue3IcZA++7 ifTDIscQdpeKT8hcL+9eHLgoSDH62SlubO/y8bB1hV8JjLW/jQpLnae0oz25h39ij4ijcp8N t5slf5DNRi1NLz5+iaaLg4gaM3ywVK2VEKdBTg+JTg3dfrb3DH7ctTQquyKun9IVY8AsxMc6 lxl4HxrpLX7HgF10685GG5fFla7R1RUnW5svgQhz6YVU33yJjk5lIIrrxKI/wLlhn066mtu1 DoD9TEAjwOmpa6ofV6rHeBPehUwMZEsLqlKfLsl0PpsJwov8TQARAQABtCNNYXJjIFp5bmdp ZXIgPG1hcmMuenluZ2llckBhcm0uY29tPokCOwQTAQIAJQIbAwYLCQgHAwIGFQgCCQoLBBYC AwECHgECF4AFAk6NvYYCGQEACgkQI9DQutE9ekObww/+NcUATWXOcnoPflpYG43GZ0XjQLng LQFjBZL+CJV5+1XMDfz4ATH37cR+8gMO1UwmWPv5tOMKLHhw6uLxGG4upPAm0qxjRA/SE3LC 22kBjWiSMrkQgv5FDcwdhAcj8A+gKgcXBeyXsGBXLjo5UQOGvPTQXcqNXB9A3ZZN9vS6QUYN TXFjnUnzCJd+PVI/4jORz9EUVw1q/+kZgmA8/GhfPH3xNetTGLyJCJcQ86acom2liLZZX4+1 6Hda2x3hxpoQo7pTu+XA2YC4XyUstNDYIsE4F4NVHGi88a3N8yWE+Z7cBI2HjGvpfNxZnmKX 6bws6RQ4LHDPhy0yzWFowJXGTqM/e79c1UeqOVxKGFF3VhJJu1nMlh+5hnW4glXOoy/WmDEM UMbl9KbJUfo+GgIQGMp8mwgW0vK4HrSmevlDeMcrLdfbbFbcZLNeFFBn6KqxFZaTd+LpylIH bOPN6fy1Dxf7UZscogYw5Pt0JscgpciuO3DAZo3eXz6ffj2NrWchnbj+SpPBiH4srfFmHY+Y LBemIIOmSqIsjoSRjNEZeEObkshDVG5NncJzbAQY+V3Q3yo9og/8ZiaulVWDbcpKyUpzt7pv cdnY3baDE8ate/cymFP5jGJK++QCeA6u6JzBp7HnKbngqWa6g8qDSjPXBPCLmmRWbc5j0lvA 6ilrF8m5Ag0ETol/RQEQAM/2pdLYCWmf3rtIiP8Wj5NwyjSL6/UrChXtoX9wlY8a4h3EX6E3 64snIJVMLbyr4bwdmPKULlny7T/R8dx/mCOWu/DztrVNQiXWOTKJnd/2iQblBT+W5W8ep/nS w3qUIckKwKdplQtzSKeE+PJ+GMS+DoNDDkcrVjUnsoCEr0aK3cO6g5hLGu8IBbC1CJYSpple VVb/sADnWF3SfUvJ/l4K8Uk4B4+X90KpA7U9MhvDTCy5mJGaTsFqDLpnqp/yqaT2P7kyMG2E w+eqtVIqwwweZA0S+tuqput5xdNAcsj2PugVx9tlw/LJo39nh8NrMxAhv5aQ+JJ2I8UTiHLX QvoC0Yc/jZX/JRB5r4x4IhK34Mv5TiH/gFfZbwxd287Y1jOaD9lhnke1SX5MXF7eCT3cgyB+ hgSu42w+2xYl3+rzIhQqxXhaP232t/b3ilJO00ZZ19d4KICGcakeiL6ZBtD8TrtkRiewI3v0 o8rUBWtjcDRgg3tWx/PcJvZnw1twbmRdaNvsvnlapD2Y9Js3woRLIjSAGOijwzFXSJyC2HU1 AAuR9uo4/QkeIrQVHIxP7TJZdJ9sGEWdeGPzzPlKLHwIX2HzfbdtPejPSXm5LJ026qdtJHgz BAb3NygZG6BH6EC1NPDQ6O53EXorXS1tsSAgp5ZDSFEBklpRVT3E0NrDABEBAAGJAh8EGAEC AAkFAk6Jf0UCGwwACgkQI9DQutE9ekMLBQ//U+Mt9DtFpzMCIHFPE9nNlsCm75j22lNiw6mX mx3cUA3pl+uRGQr/zQC5inQNtjFUmwGkHqrAw+SmG5gsgnM4pSdYvraWaCWOZCQCx1lpaCOl MotrNcwMJTJLQGc4BjJyOeSH59HQDitKfKMu/yjRhzT8CXhys6R0kYMrEN0tbe1cFOJkxSbV 0GgRTDF4PKyLT+RncoKxQe8lGxuk5614aRpBQa0LPafkirwqkUtxsPnarkPUEfkBlnIhAR8L kmneYLu0AvbWjfJCUH7qfpyS/FRrQCoBq9QIEcf2v1f0AIpA27f9KCEv5MZSHXGCdNcbjKw1 39YxYZhmXaHFKDSZIC29YhQJeXWlfDEDq6nIhvurZy3mSh2OMQgaIoFexPCsBBOclH8QUtMk a3jW/qYyrV+qUq9Wf3SKPrXf7B3xB332jFCETbyZQXqmowV+2b3rJFRWn5hK5B+xwvuxKyGq qDOGjof2dKl2zBIxbFgOclV7wqCVkhxSJi/QaOj2zBqSNPXga5DWtX3ekRnJLa1+ijXxmdjz hApihi08gwvP5G9fNGKQyRETePEtEAWt0b7dOqMzYBYGRVr7uS4uT6WP7fzOwAJC4lU7ZYWZ yVshCa0IvTtp1085RtT3qhh9mobkcZ+7cQOY+Tx2RGXS9WeOh2jZjdoWUv6CevXNQyOUXMM= Organization: ARM Ltd Message-ID: <7943816e-1cf0-dbc9-157d-71a83c5016c6@arm.com> Date: Tue, 4 Jun 2019 12:54:51 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <1559646306-18860-4-git-send-email-guoren@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/06/2019 12:05, guoren@kernel.org wrote: > From: Guo Ren > > The csky,mpintc could deliver a external irq to one cpu or all cpus, but > it couldn't deliver a external irq to a group of cpus with cpu_mask. So > we only use auto deliver mode when affinity mask_val is equal to > cpu_present_mask. > > There is no limitation for only two cpus in SMP system. > > Signed-off-by: Guo Ren > Cc: Marc Zyngier > --- > drivers/irqchip/irq-csky-mpintc.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/irqchip/irq-csky-mpintc.c b/drivers/irqchip/irq-csky-mpintc.c > index a451a07..2740dd5 100644 > --- a/drivers/irqchip/irq-csky-mpintc.c > +++ b/drivers/irqchip/irq-csky-mpintc.c > @@ -143,8 +143,19 @@ static int csky_irq_set_affinity(struct irq_data *d, > if (cpu >= nr_cpu_ids) > return -EINVAL; > > - /* Enable interrupt destination */ > - cpu |= BIT(31); > + /* > + * The csky,mpintc could support auto irq deliver, but it only > + * could deliver external irq to one cpu or all cpus. So it > + * doesn't support deliver external irq to a group of cpus > + * with cpu_mask. > + * SO we only use auto deliver mode when affinity mask_val is > + * equal to cpu_present_mask. > + * > + */ > + if (cpumask_equal(mask_val, cpu_present_mask)) > + cpu = 0; > + else > + cpu |= BIT(31); > > writel_relaxed(cpu, INTCG_base + INTCG_CIDSTR + offset); > > Isn't that the same patch as [1]? In which case, I've queued it as a fix already. Thanks, M. [1] https://lkml.org/lkml/2019/5/21/174 -- Jazz is not dead. It just smells funny...