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[209.132.180.67]) by mx.google.com with ESMTP id b8si27095440pgi.209.2019.06.05.09.03.52; Wed, 05 Jun 2019 09:04:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=fp3HzWJA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728523AbfFEQAp (ORCPT + 99 others); Wed, 5 Jun 2019 12:00:45 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:40488 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726421AbfFEQAp (ORCPT ); Wed, 5 Jun 2019 12:00:45 -0400 Received: by mail-pg1-f196.google.com with SMTP id d30so12621564pgm.7 for ; Wed, 05 Jun 2019 09:00:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=UKzg+DCRQdvZVV0IXkzVXeynq1ptXUJceOTdTsX6Gl4=; b=fp3HzWJAxjvdFoCskFMW0CsmQbIUx9erbqizUvfclUhHxGf+Erb+WctD9tdHvPc110 JcTZ1Jrj3cEXaY3oRw+lKZAxo2afB9jZNL425d6yl/xh2Q4coGKZe1nlURSRV5tNZ6i6 6icO1zrReJmPy7Du5sTkxfslAWn6noDKs/PrMyNUtOVkwOJpkPIQe3dijIExYyfN/ZCu i1wSJCUH6EXOHXB1+broOTrpsq0NDHU6pZXot1zH/+qGeGZeHWd8wJmfmHx5m8lSJFZ8 aT+E7HnrfPIakIqleI4JD6nj+pq/wnrl7M07QdrRxCNeapcqe4RkT702f9AqOz1d2G6Y RanQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=UKzg+DCRQdvZVV0IXkzVXeynq1ptXUJceOTdTsX6Gl4=; b=KCCLSdltwY4/UfCvuuIWra7eX6W0CFPZG2qON+2WFJURA+leU66F0xkjt7p+uixhbH kVZY57Sdirjq4p+qOyfQ3ApEjdnkkutwOb+quPveh2skd0OzL8c6Q6R0yNPBWrlz2h0w 3A3PbIcok/BpZK3LfdNSvLTlvim9OSLQIbD70BmnS4gQEokANrX0D0kzUiSBdyVkJ5O6 CT4n9qeN/6hsJbrYTIZI5owCe9+WN/As4aHo/Jil/P1/ZuFu1+sHSV9r0Xv+3UoGCX+H 8419wJo4WoBBgLVYMIY4jWUfIcykG8eJCS4kRKyyIg9ZYRaw86Lj6DrXxxzLLQqedJNS qcoA== X-Gm-Message-State: APjAAAU8YylSobbY7yHD7bb/KlPoTFToW9V6KE55Ue7vK+sXnN1B9n3g FoVoA3CYPQVjgbNKhlKV56k7xA== X-Received: by 2002:a63:5457:: with SMTP id e23mr5607600pgm.307.1559750444418; Wed, 05 Jun 2019 09:00:44 -0700 (PDT) Received: from localhost ([2601:602:9200:a1a5:b195:645b:2f67:9ebb]) by smtp.googlemail.com with ESMTPSA id a12sm21837874pgq.0.2019.06.05.09.00.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 05 Jun 2019 09:00:43 -0700 (PDT) From: Kevin Hilman To: Atish Patra , linux-kernel@vger.kernel.org Cc: Atish Patra , Albert Ou , Anup Patel , Jonathan Corbet , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, Nick Kossifidis , Palmer Dabbelt , Zong Li , linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, marek.vasut@gmail.com, catalin.marinas@arm.com, will.deacon@arm.com, trini@konsulko.com, paul.walmsley@sifive.com Subject: Re: [v3 PATCH] RISC-V: Add a PE/COFF compliant Image header. In-Reply-To: <20190523183516.583-1-atish.patra@wdc.com> References: <20190523183516.583-1-atish.patra@wdc.com> Date: Wed, 05 Jun 2019 09:00:42 -0700 Message-ID: <7hef48ggyd.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Atish Patra writes: > Currently, last stage boot loaders such as U-Boot can accept only > uImage which is an unnecessary additional step in automating boot flows. > > Add a PE/COFF compliant image header that boot loaders can parse and > directly load kernel flat Image. The existing booting methods will continue > to work as it is. > > Another goal of this header is to support EFI stub for RISC-V in future. > EFI specification needs PE/COFF image header in the beginning of the kernel > image in order to load it as an EFI application. In order to support > EFI stub, code0 should be replaced with "MZ" magic string and res5(at > offset 0x3c) should point to the rest of the PE/COFF header (which will > be added during EFI support). > > This patch is based on ARM64 boot image header and provides an opprtunity > to combine both ARM64 & RISC-V image headers. > > Tested on both QEMU and HiFive Unleashed using OpenSBI + U-Boot + Linux. > > Signed-off-by: Atish Patra Tested booti support on HiFive Unleashed using OpenSBI + U-Boot (master branch) + Linux. Tested-by: Kevin Hilman