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From:   Kevin Hilman <khilman@baylibre.com>
To:     Paul Walmsley <paul.walmsley@sifive.com>,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v3 0/5] arch: riscv: add board and SoC DT file support
In-Reply-To: <20190602080500.31700-1-paul.walmsley@sifive.com>
References: <20190602080500.31700-1-paul.walmsley@sifive.com>
Date:   Wed, 05 Jun 2019 10:36:58 -0700
Message-ID: <7h36kogchx.fsf@baylibre.com>
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Hi Paul,

Paul Walmsley <paul.walmsley@sifive.com> writes:

> Add support for building flattened DT files from DT source files under
> arch/riscv/boot/dts.  Follow existing kernel precedent from other SoC
> architectures.  Start our board support by adding initial support for
> the SiFive FU540 SoC and the first development board that uses it, the
> SiFive HiFive Unleashed A00.
>
> This third version of the patch set adds I2C data for the chip,
> incorporates all remaining changes that riscv-pk was making
> automatically, and addresses a comment from Rob Herring
> <robh@kernel.org>.
>
> Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the
> BBL and open-source FSBL, with modifications to pass in the DTB
> file generated by these patches.

Tested this series on top of v5.2-rc3 on HiFive Unleashed board using
OpenSBI + mainline u-boot (master branch as of today).

Tested-by: Kevin Hilman <khilman@baylibre.com>

> This patch series can be found, along with the PRCI patch set
> and the DT macro prerequisite patch, at:
>
> https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1

nit: I only see this series in that branch, not any of the prerequisite
patches you mentioned, which made me assume I could this series alone on
top of v5.2-rc3, which worked just fine.

Kevin