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[209.132.180.67]) by mx.google.com with ESMTP id h9si363120pgq.539.2019.06.05.18.22.08; Wed, 05 Jun 2019 18:22:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726633AbfFFBVB (ORCPT + 99 others); Wed, 5 Jun 2019 21:21:01 -0400 Received: from mga06.intel.com ([134.134.136.31]:62188 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726541AbfFFBVB (ORCPT ); Wed, 5 Jun 2019 21:21:01 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jun 2019 18:21:00 -0700 X-ExtLoop1: 1 Received: from likexu-e5-2699-v4.sh.intel.com ([10.239.48.178]) by orsmga008.jf.intel.com with ESMTP; 05 Jun 2019 18:20:58 -0700 From: Like Xu To: Paolo Bonzini , kvm@vger.kernel.org, =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Cc: Eduardo Habkost , sean.j.christopherson@intel.com, xiaoyao.li@linux.intel.com, linux-kernel@vger.kernel.org, like.xu@intel.com Subject: [PATCH v4] KVM: x86: Add Intel CPUID.1F cpuid emulation support Date: Thu, 6 Jun 2019 09:18:45 +0800 Message-Id: <20190606011845.40223-1-like.xu@linux.intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support to expose Intel V2 Extended Topology Enumeration Leaf for some new systems with multiple software-visible die within each package. Because unimplemented and unexposed leaves should be explicitly reported as zero, there is no need to limit cpuid.0.eax to the maximum value of feature configuration but limit it to the highest leaf implemented in the current code. A single clamping seems sufficient and cheaper. Co-developed-by: Xiaoyao Li Signed-off-by: Xiaoyao Li Signed-off-by: Like Xu --- ==changelog== v4: - Limited cpuid.0.eax to the highest leaf implemented in KVM v3: https://lkml.org/lkml/2019/5/26/64 - Refine commit message and comment v2: https://lkml.org/lkml/2019/4/25/1246 - Apply cpuid.1f check rule on Intel SDM page 3-222 Vol.2A - Add comment to handle 0x1f anf 0xb in common code - Reduce check time in a descending-break style v1: https://lkml.org/lkml/2019/4/22/28 --- arch/x86/kvm/cpuid.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index e18a9f9f65b5..f819011e6a13 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -426,7 +426,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, switch (function) { case 0: - entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd)); + /* Limited to the highest leaf implemented in KVM. */ + entry->eax = min(entry->eax, 0x1f); break; case 1: entry->edx &= kvm_cpuid_1_edx_x86_features; @@ -546,7 +547,11 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, entry->edx = edx.full; break; } - /* function 0xb has additional index. */ + /* + * Per Intel's SDM, the 0x1f is a superset of 0xb, + * thus they can be handled by common code. + */ + case 0x1f: case 0xb: { int i, level_type; -- 2.21.0